radv: fix order of the guardband register emission.
authorDave Airlie <airlied@redhat.com>
Sun, 2 Apr 2017 04:36:51 +0000 (14:36 +1000)
committerDave Airlie <airlied@redhat.com>
Sun, 2 Apr 2017 10:17:30 +0000 (20:17 +1000)
y is vert, x is horiz.

Noticed in visual inspection compared to radeonsi.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
src/amd/vulkan/si_cmd_buffer.c

index e847dcff035baeea5a1b1bc35637dd96b9c1cba7..e176abe3869471911720c01db7045fc00ab16db8 100644 (file)
@@ -627,10 +627,10 @@ si_write_scissors(struct radeon_winsys_cs *cs, int first,
        }
 
        radeon_set_context_reg_seq(cs, R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, 4);
-       radeon_emit(cs, fui(guardband_x));
-       radeon_emit(cs, fui(1.0));
        radeon_emit(cs, fui(guardband_y));
        radeon_emit(cs, fui(1.0));
+       radeon_emit(cs, fui(guardband_x));
+       radeon_emit(cs, fui(1.0));
 }
 
 static inline unsigned