intel/genxml: Add GT_MODE hashing defs for Gen9.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index 9df7cd827380d46c5543153ee96ba701ef26db80..0d037489df9e469e5c91c50c2167016ff2af5952 100644 (file)
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -6477,6 +6477,23 @@
     <field name="Color Compression Disable Mask" start="31" end="31" type="bool"/>
   </register>
 
+  <register name="GT_MODE" length="1" num="0x7008">
+    <field name="Subslice Hashing" start="8" end="9" type="uint">
+      <value name="8x8" value="0"/>
+      <value name="16x4" value="1"/>
+      <value name="8x4" value="2"/>
+      <value name="16x16" value="3"/>
+    </field>
+    <field name="Subslice Hashing Mask" start="24" end="25" type="int"/>
+    <field name="Slice Hashing" start="11" end="12" type="uint">
+      <value name="NORMAL" value="0"/>
+      <value name="DISABLED" value="1"/>
+      <value name="32x16" value="2"/>
+      <value name="32x32" value="3"/>
+    </field>
+    <field name="Slice Hashing Mask" start="27" end="28" type="int"/>
+  </register>
+
   <register name="CL_INVOCATION_COUNT" length="2" num="0x2338">
     <field name="CL Invocation Count Report" start="0" end="63" type="uint"/>
   </register>