Patch to fix coldfire bugs found by PlumHall testing.

	* config/m68k/lb1sf68.asm (udivsi3): Change jmi to jcs.  Fix comments.
	* config/m68k/m68k.h (LEGITIMATE_INDEX_REG_P): Reject SIGN_EXTEND of
	HImode reg when TARGET_5200.

From-SVN: r25516

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8dd6b0f63e8bf2ed62dd3bd36dfc155219741e74..c82c8f22f2fcc8ae6e37054bdecd74c27b32824d 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+Mon Mar  1 15:03:51 1999  Jim Wilson  <wilson@cygnus.com>
+
+       * config/m68k/lb1sf68.asm (udivsi3): Change jmi to jcs.  Fix comments.
+       * config/m68k/m68k.h (LEGITIMATE_INDEX_REG_P): Reject SIGN_EXTEND of
+       HImode reg when TARGET_5200.
+
 Mon Mar  1 21:44:30 1999  J"orn Rennecke <amylaar@cygnus.co.uk>
 
        From Toshiyasu Morita:

diff --git a/gcc/config/m68k/lb1sf68.asm b/gcc/config/m68k/lb1sf68.asm
index 9e33ccb4b2f0c10e69e1508e313fed2315cb5c1f..ef40a340763351fe947fc505bc608268129bfa78 100644 (file)
--- a/gcc/config/m68k/lb1sf68.asm
+++ b/gcc/config/m68k/lb1sf68.asm
@@ -382,9 +382,9 @@ L1: addl    d0,d0           | shift reg pair (p,a) one bit left
        addxl   d2,d2
        movl    d2,d3           | subtract b from p, store in tmp.
        subl    d1,d3
-       jmi     L2              | if the result is not is negative, set the
-       bset    IMM (0),d0      | low order bit of a to 1 and store tmp in p.
-       movl    d3,d2
+       jcs     L2              | if no carry,
+       bset    IMM (0),d0      | set the low order bit of a to 1,
+       movl    d3,d2           | and store tmp in p.
 L2:    subql   IMM (1),d4
        jcc     L1
        moveml  sp@,d2-d4       | restore data registers

diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h
index 23c2fb316b9c333af72d554ed83a6b3ed36d626f..268b639d8b73793c001aae7ea00df42be56a442e 100644 (file)
--- a/gcc/config/m68k/m68k.h
+++ b/gcc/config/m68k/m68k.h
@@ -1463,9 +1463,11 @@ __transfer_from_trampoline ()                                    \
          && (TARGET_68020 || (unsigned) INTVAL (XEXP (X, 0)) + 0x80 < 0x100))          \
        { rtx go_temp = XEXP (X, 1); GO_IF_INDEXING (go_temp, ADDR); } } }
 
+/* coldfire/5200 does not allow HImode index registers.  */
 #define LEGITIMATE_INDEX_REG_P(X)   \
   ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))     \
-   || (GET_CODE (X) == SIGN_EXTEND                     \
+   || (! TARGET_5200                                   \
+       && GET_CODE (X) == SIGN_EXTEND                  \
        && GET_CODE (XEXP (X, 0)) == REG                        \
        && GET_MODE (XEXP (X, 0)) == HImode             \
        && REG_OK_FOR_INDEX_P (XEXP (X, 0)))            \