+2019-12-20 Michael Meissner <meissner@linux.ibm.com>
+
+ * config/rs6000/predicates.md (cint34_operand): Use
+ SIGNED_INTEGER_34BIT_P macro.
+ * config/rs6000/rs6000.c (num_insns_constant_gpr): Use the
+ SIGNED_INTEGER_16BIT_P and SIGNED_INTEGER_34BIT_P macros.
+ (address_to_insn_form): Use the SIGNED_INTEGER_16BIT_P and
+ SIGNED_INTEGER_34BIT_P macros.
+ * config/rs6000/rs6000.h (SIGNED_INTEGER_NBIT_P): New macro.
+ (SIGNED_INTEGER_16BIT_P): Rename SIGNED_16BIT_OFFSET_P to be
+ SIGNED_INTEGER_34BIT_P.
+ (SIGNED_INTEGER_34BIT_P): Rename SIGNED_34BIT_OFFSET_P to be
+ SIGNED_INTEGER_34BIT_P.
+
2019-12-20 Stam Markianos-Wright <stam.markianos-wright@arm.com>
* doc/sourcebuild.texi
if (!TARGET_PREFIXED_ADDR)
return 0;
- return SIGNED_34BIT_OFFSET_P (INTVAL (op));
+ return SIGNED_INTEGER_34BIT_P (INTVAL (op));
})
;; Return 1 if op is a register that is not special.
num_insns_constant_gpr (HOST_WIDE_INT value)
{
/* signed constant loadable with addi */
- if (((unsigned HOST_WIDE_INT) value + 0x8000) < 0x10000)
+ if (SIGNED_INTEGER_16BIT_P (value))
return 1;
/* constant loadable with addis */
return 1;
/* PADDI can support up to 34 bit signed integers. */
- else if (TARGET_PREFIXED_ADDR && SIGNED_34BIT_OFFSET_P (value))
+ else if (TARGET_PREFIXED_ADDR && SIGNED_INTEGER_34BIT_P (value))
return 1;
else if (TARGET_POWERPC64)
return INSN_FORM_BAD;
HOST_WIDE_INT offset = INTVAL (op1);
- if (!SIGNED_34BIT_OFFSET_P (offset))
+ if (!SIGNED_INTEGER_34BIT_P (offset))
return INSN_FORM_BAD;
/* Check for local and external PC-relative addresses. Labels are always
return INSN_FORM_BAD;
/* Large offsets must be prefixed. */
- if (!SIGNED_16BIT_OFFSET_P (offset))
+ if (!SIGNED_INTEGER_16BIT_P (offset))
{
if (TARGET_PREFIXED_ADDR)
return INSN_FORM_PREFIXED_NUMERIC;
#pragma GCC poison TARGET_FLOAT128 OPTION_MASK_FLOAT128 MASK_FLOAT128
#endif
-/* Whether a given VALUE is a valid 16 or 34-bit signed offset. */
-#define SIGNED_16BIT_OFFSET_P(VALUE) \
+/* Whether a given VALUE is a valid 16 or 34-bit signed integer. */
+#define SIGNED_INTEGER_NBIT_P(VALUE, N) \
IN_RANGE ((VALUE), \
- -(HOST_WIDE_INT_1 << 15), \
- (HOST_WIDE_INT_1 << 15) - 1)
+ -(HOST_WIDE_INT_1 << ((N)-1)), \
+ (HOST_WIDE_INT_1 << ((N)-1)) - 1)
-#define SIGNED_34BIT_OFFSET_P(VALUE) \
- IN_RANGE ((VALUE), \
- -(HOST_WIDE_INT_1 << 33), \
- (HOST_WIDE_INT_1 << 33) - 1)
+#define SIGNED_INTEGER_16BIT_P(VALUE) SIGNED_INTEGER_NBIT_P (VALUE, 16)
+#define SIGNED_INTEGER_34BIT_P(VALUE) SIGNED_INTEGER_NBIT_P (VALUE, 34)
-/* Like SIGNED_16BIT_OFFSET_P and SIGNED_34BIT_OFFSET_P, but with an extra
+/* Like SIGNED_INTEGER_16BIT_P and SIGNED_INTEGER_34BIT_P, but with an extra
argument that gives a length to validate a range of addresses, to allow for
splitting insns into several insns, each of which has an offsettable
address. */