re PR target/81375 (unrecognizable insn)
authorUros Bizjak <ubizjak@gmail.com>
Mon, 10 Jul 2017 22:01:06 +0000 (00:01 +0200)
committerUros Bizjak <uros@gcc.gnu.org>
Mon, 10 Jul 2017 22:01:06 +0000 (00:01 +0200)
PR target/81375
* config/i386/i386.md (divsf3): Add TARGET_SSE to TARGET_SSE_MATH.
(rcpps): Ditto.
(*rsqrtsf2_sse): Ditto.
(rsqrtsf2): Ditto.
(div<mode>3): Macroize insn from divdf3 and divsf3
using MODEF mode iterator.

testsuite/ChangeLog:

PR target/81375
* gcc.target/i386/pr81375.c: New test.

From-SVN: r250107

gcc/ChangeLog
gcc/config/i386/i386.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/i386/pr81375.c [new file with mode: 0644]

index 1e671dba47671cd8d08b7eebba616aecab932a0c..908e8cad3e81f9fd31c63a9be45945d0d288ae54 100644 (file)
@@ -1,3 +1,13 @@
+2017-07-10  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/81375
+       * config/i386/i386.md (divsf3): Add TARGET_SSE to TARGET_SSE_MATH.
+       (rcpps): Ditto.
+       (*rsqrtsf2_sse): Ditto.
+       (rsqrtsf2): Ditto.
+       (div<mode>3): Macroize insn from divdf3 and divsf3
+       using MODEF mode iterator.
+
 2017-07-10  Martin Sebor  <msebor@redhat.com>
 
        PR tree-optimization/80397
index da0f7c256afcebae5fe31435b4141104622b9b19..4018e6746b696320b2a77d1622e9094fc83ffee4 100644 (file)
 (define_expand "floatunsdisf2"
   [(use (match_operand:SF 0 "register_operand"))
    (use (match_operand:DI 1 "nonimmediate_operand"))]
-  "TARGET_64BIT && TARGET_SSE_MATH"
+  "TARGET_64BIT && TARGET_SSE && TARGET_SSE_MATH"
   "x86_emit_floatuns (operands); DONE;")
 
 (define_expand "floatunsdidf2"
                (match_operand:XF 2 "register_operand")))]
   "TARGET_80387")
 
-(define_expand "divdf3"
-  [(set (match_operand:DF 0 "register_operand")
-       (div:DF (match_operand:DF 1 "register_operand")
-               (match_operand:DF 2 "nonimmediate_operand")))]
-   "(TARGET_80387 && X87_ENABLE_ARITH (DFmode))
-    || (TARGET_SSE2 && TARGET_SSE_MATH)")
-
-(define_expand "divsf3"
-  [(set (match_operand:SF 0 "register_operand")
-       (div:SF (match_operand:SF 1 "register_operand")
-               (match_operand:SF 2 "nonimmediate_operand")))]
-  "(TARGET_80387 && X87_ENABLE_ARITH (SFmode))
-    || TARGET_SSE_MATH"
+(define_expand "div<mode>3"
+  [(set (match_operand:MODEF 0 "register_operand")
+       (div:MODEF (match_operand:MODEF 1 "register_operand")
+                  (match_operand:MODEF 2 "nonimmediate_operand")))]
+  "(TARGET_80387 && X87_ENABLE_ARITH (<MODE>mode))
+    || (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)"
 {
-  if (TARGET_SSE_MATH
+  if (<MODE>mode == SFmode
+      && TARGET_SSE && TARGET_SSE_MATH
       && TARGET_RECIP_DIV
       && optimize_insn_for_speed_p ()
       && flag_finite_math_only && !flag_trapping_math
   [(set (match_operand:SF 0 "register_operand" "=x")
        (unspec:SF [(match_operand:SF 1 "nonimmediate_operand" "xm")]
                   UNSPEC_RCP))]
-  "TARGET_SSE_MATH"
+  "TARGET_SSE && TARGET_SSE_MATH"
   "%vrcpss\t{%1, %d0|%d0, %1}"
   [(set_attr "type" "sse")
    (set_attr "atom_sse_attr" "rcp")
   [(set (match_operand:SF 0 "register_operand" "=x")
        (unspec:SF [(match_operand:SF 1 "nonimmediate_operand" "xm")]
                   UNSPEC_RSQRT))]
-  "TARGET_SSE_MATH"
+  "TARGET_SSE && TARGET_SSE_MATH"
   "%vrsqrtss\t{%1, %d0|%d0, %1}"
   [(set_attr "type" "sse")
    (set_attr "atom_sse_attr" "rcp")
   [(set (match_operand:SF 0 "register_operand")
        (unspec:SF [(match_operand:SF 1 "nonimmediate_operand")]
                   UNSPEC_RSQRT))]
-  "TARGET_SSE_MATH"
+  "TARGET_SSE && TARGET_SSE_MATH"
 {
   ix86_emit_swsqrtsf (operands[0], operands[1], SFmode, 1);
   DONE;
    || (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)"
 {
   if (<MODE>mode == SFmode
-      && TARGET_SSE_MATH
+      && TARGET_SSE && TARGET_SSE_MATH
       && TARGET_RECIP_SQRT
       && !optimize_function_for_size_p (cfun)
       && flag_finite_math_only && !flag_trapping_math
index f3b325c9f8d63a945a1f36e229350cafea04183b..f6dec47d0481c238aedb90d36bc13a0f1158ca58 100644 (file)
@@ -1,12 +1,12 @@
+2017-07-10  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/81375
+       * gcc.target/i386/pr81375.c: New test.
+
 2017-07-10  Martin Sebor  <msebor@redhat.com>
 
        PR tree-optimization/80397
        * gcc.dg/tree-ssa/builtin-sprintf-warn-17.c: New test.
-diff --git a/gcc/gimple-ssa-sprintf.c b/gcc/gimple-ssa-sprintf.c
-index 2e62086..d63d5be 100644
---- a/gcc/gimple-ssa-sprintf.c
-+++ b/gcc/gimple-ssa-sprintf.c
-@@ -1249,7 +1249,7 @@ format_integer (const directive &dir, tree arg)
 
 2017-07-10  Martin Sebor  <msebor@redhat.com>
 
diff --git a/gcc/testsuite/gcc.target/i386/pr81375.c b/gcc/testsuite/gcc.target/i386/pr81375.c
new file mode 100644 (file)
index 0000000..256a79d
--- /dev/null
@@ -0,0 +1,8 @@
+/* PR target/81375 */
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-mno-80387 -mno-sse -mfpmath=sse" } */
+
+float foo (float a, float b)
+{
+  return a / b;
+}