ppc/svp64: share SVP64 context via libopcodes

diff --git a/gas/config/tc-ppc-svp64.c b/gas/config/tc-ppc-svp64.c
index ec0fda793c8a15834a4c0fced5bb98ce7a5c51c5..a02815f9e3315410e471ea591df1ef260bce52c3 100644 (file)
--- a/gas/config/tc-ppc-svp64.c
+++ b/gas/config/tc-ppc-svp64.c
@@ -21,49 +21,6 @@
 
 #include <setjmp.h>
 
-struct svp64_ctx {
-  const struct svp64_desc *desc;
-  struct svp64_insn insn;
-  unsigned int pmmode : 1;
-  unsigned int pmask : 3;
-  unsigned int smmode : 1;
-  unsigned int smask : 3;
-  unsigned int mmode : 1;
-  unsigned int has_pmask : 1;
-  unsigned int has_smask : 1;
-  unsigned int mask_m_specified : 1;
-  unsigned int subvl : 2;
-  unsigned int destwid : 2;
-  unsigned int srcwid : 2;
-  unsigned int ldst_elstride : 1;
-  unsigned int sv_mode_explicit : 1;
-  unsigned int sv_mode : 2;
-  unsigned int sat : 1;
-  unsigned int src_zero : 1;
-  unsigned int dst_zero : 1;
-  unsigned int ff : 3 + 2; /* 3-bit plus RC1 */
-  unsigned int pr : 3 + 2; /* 3-bit plus RC1 */
-  unsigned int mr : 1;
-  unsigned int rg : 1;
-  unsigned int crm : 1;
-  unsigned int type : 2;
-  unsigned int rc : 1;
-  unsigned int mode : 5;
-
-  /* These are not implemented yet. */
-  unsigned int bc_all : 1;
-  unsigned int bc_lru : 1;
-  unsigned int bc_brc : 1;
-  unsigned int bc_svstep : 1;
-  unsigned int bc_vsb : 1;
-  unsigned int bc_vlset : 1;
-  unsigned int bc_vli : 1;
-  unsigned int bc_snz : 1;
-};
-
-#define SVP64_RC1_ACTIVE (1U << 3U)
-#define SVP64_RC1_INVERT (SVP64_RC1_ACTIVE | (1U << 4U))
-
 enum svp64_type {
   SVP64_TYPE_NONE,
   SVP64_TYPE_LD,

diff --git a/include/opcode/ppc-svp64.h b/include/opcode/ppc-svp64.h
index 87cac813436f25989835226f0be6ce41d66ef02d..b37024212a7cd6e83172161dd37b08f9a38f5e3d 100644 (file)
--- a/include/opcode/ppc-svp64.h
+++ b/include/opcode/ppc-svp64.h
@@ -37,6 +37,49 @@ struct svp64_extra_desc {
 const struct svp64_extra_desc *
 svp64_extra_desc (const struct svp64_desc *desc, ppc_opindex_t opindex);
 
+struct svp64_ctx {
+  const struct svp64_desc *desc;
+  struct svp64_insn insn;
+  unsigned int pmmode : 1;
+  unsigned int pmask : 3;
+  unsigned int smmode : 1;
+  unsigned int smask : 3;
+  unsigned int mmode : 1;
+  unsigned int has_pmask : 1;
+  unsigned int has_smask : 1;
+  unsigned int mask_m_specified : 1;
+  unsigned int subvl : 2;
+  unsigned int destwid : 2;
+  unsigned int srcwid : 2;
+  unsigned int ldst_elstride : 1;
+  unsigned int sv_mode_explicit : 1;
+  unsigned int sv_mode : 2;
+  unsigned int sat : 1;
+  unsigned int src_zero : 1;
+  unsigned int dst_zero : 1;
+  unsigned int ff : 3 + 2; /* 3-bit plus RC1 */
+  unsigned int pr : 3 + 2; /* 3-bit plus RC1 */
+  unsigned int mr : 1;
+  unsigned int rg : 1;
+  unsigned int crm : 1;
+  unsigned int type : 2;
+  unsigned int rc : 1;
+  unsigned int mode : 5;
+
+  /* These are not implemented yet. */
+  unsigned int bc_all : 1;
+  unsigned int bc_lru : 1;
+  unsigned int bc_brc : 1;
+  unsigned int bc_svstep : 1;
+  unsigned int bc_vsb : 1;
+  unsigned int bc_vlset : 1;
+  unsigned int bc_vli : 1;
+  unsigned int bc_snz : 1;
+};
+
+#define SVP64_RC1_ACTIVE (1U << 3U)
+#define SVP64_RC1_INVERT (SVP64_RC1_ACTIVE | (1U << 4U))
+
 #ifdef __cplusplus
 }
 #endif