soc/integration/cpu_interface: generate name for Memories in get_csr_header

diff --git a/litex/soc/integration/cpu_interface.py b/litex/soc/integration/cpu_interface.py
index 147d65e8b21cacf04f50884e8d0f0bdc8c4165d7..49acb5aac117ea4664682332637929ca2f5607a1 100644 (file)
--- a/litex/soc/integration/cpu_interface.py
+++ b/litex/soc/integration/cpu_interface.py
@@ -137,6 +137,7 @@ def get_csr_header(regions, constants, with_access_functions=True, with_shadow_b
         if not with_shadow_base:
             origin &= (~shadow_base)
         if isinstance(obj, Memory):
+            r += "\n/* "+name+" */\n"
             r += "#define CSR_"+name.upper()+"_BASE "+hex(origin)+"\n"
         else:
             r += "\n/* "+name+" */\n"