+2010-12-14 Joel Brobecker <brobecker@adacore.com>
+
+ * irix5-nat.c: Replace fp_r, fp_regs and fp_scr by __fp_r, __fp_regs
+ and __fp_scr respectively throughout.
+ * configure.ac: Compile with -Dsiginfo=__siginfo if building with
+ Python using GCC on IRIX.
+ * configure: Regenerate.
+
2010-12-13 Kevin Buettner <kevinb@redhat.com>
* solib-svr4.c (enable_break): Don't attempt to place breakpoints,
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: ${PYTHON_CFLAGS}" >&5
$as_echo "${PYTHON_CFLAGS}" >&6; }
fi
+
+ # On IRIX, type siginfo is not defined. Instead, sys/siginfo.h provides:
+ # #if _SGIAPI
+ # #define siginfo __siginfo
+ # #endif
+ # The problem is that including Python causes some XOPEN macros to be
+ # unilaterally defined, and that in turn causes _SGIAPI to evaluate
+ # to false. So, we work around this issue by defining siginfo ourself
+ # though the command-line.
+ case "$gdb_host" in
+ irix*) if test "${GCC}" = yes; then
+ CPPFLAGS="$CPPFLAGS -Dsiginfo=__siginfo"
+ fi
+ ;;
+ esac
else
# Even if Python support is not compiled in, we need to have these files
# included.
done
AC_MSG_RESULT(${PYTHON_CFLAGS})
fi
+
+ # On IRIX, type siginfo is not defined. Instead, sys/siginfo.h provides:
+ # #if _SGIAPI
+ # #define siginfo __siginfo
+ # #endif
+ # The problem is that including Python causes some XOPEN macros to be
+ # unilaterally defined, and that in turn causes _SGIAPI to evaluate
+ # to false. So, we work around this issue by defining siginfo ourself
+ # though the command-line.
+ case "$gdb_host" in
+ irix*) if test "${GCC}" = yes; then
+ CPPFLAGS="$CPPFLAGS -Dsiginfo=__siginfo"
+ fi
+ ;;
+ esac
else
# Even if Python support is not compiled in, we need to have these files
# included.
for (regi = 0; regi < 32; regi++)
regcache_raw_supply (regcache, gdbarch_fp0_regnum (gdbarch) + regi,
- (const char *) &fpregsetp->fp_r.fp_regs[regi]);
+ (const char *) &fpregsetp->__fp_r.__fp_regs[regi]);
/* We can't supply the FSR register directly to the regcache,
because there is a size issue: On one hand, fpregsetp->fp_csr
So we use a buffer of the correct size and copy into it the register
value at the proper location. */
memset (fsrbuf, 0, 4);
- memcpy (fsrbuf + 4, &fpregsetp->fp_csr, 4);
+ memcpy (fsrbuf + 4, &fpregsetp->__fp_csr, 4);
regcache_raw_supply (regcache,
mips_regnum (gdbarch)->fp_control_status, fsrbuf);
{
if ((regno == -1) || (regno == regi))
{
- to = (char *) &(fpregsetp->fp_r.fp_regs[regi - gdbarch_fp0_regnum
- (gdbarch)]);
+ const int fp0_regnum = gdbarch_fp0_regnum (gdbarch);
+
+ to = (char *) &(fpregsetp->__fp_r.__fp_regs[regi - fp0_regnum]);
regcache_raw_collect (regcache, regi, to);
}
}
regcache_raw_collect (regcache,
mips_regnum (gdbarch)->fp_control_status, fsrbuf);
- memcpy (&fpregsetp->fp_csr, fsrbuf + 4, 4);
+ memcpy (&fpregsetp->__fp_csr, fsrbuf + 4, 4);
}
}