mem-cache: Allow clean operations when block allocation fails

Block allocation can fail when there is an in-service MSHR that
operates on the victim block. This can happed due to:
* an upgrade operation: a request that needs a writable copy of the
  block finds a shared (non-writable) copy of the block in the cache
  and has allocates an MSHR for the pending upgrade operation, or
* a clean operation: a clean request finds a dirty copy of the block
  and allocates an MSHR for the pending clean operation.
This changes relaxes an assertion to allow for the 2nd case (cache
clean operations).

Change-Id: Ib51482160b5f2b3702ed744b0eac2029d34bc9d4
Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/9021
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>

diff --git a/src/mem/cache/cache.cc b/src/mem/cache/cache.cc
index 85c96772c9aca45b3cae886edbcdf343cc5480ae..9ee9359611ea19c596edd8c45fb31e95c9a580d2 100644 (file)
--- a/src/mem/cache/cache.cc
+++ b/src/mem/cache/cache.cc
@@ -1826,10 +1826,10 @@ Cache::allocateBlock(Addr addr, bool is_secure, PacketList &writebacks)
         Addr repl_addr = tags->regenerateBlkAddr(blk);
         MSHR *repl_mshr = mshrQueue.findMatch(repl_addr, blk->isSecure());
         if (repl_mshr) {
-            // must be an outstanding upgrade request
+            // must be an outstanding upgrade or clean request
             // on a block we're about to replace...
-            assert(!blk->isWritable() || blk->isDirty());
-            assert(repl_mshr->needsWritable());
+            assert((!blk->isWritable() && repl_mshr->needsWritable()) ||
+                   repl_mshr->isCleaning());
             // too hard to replace block with transient state
             // allocation failed, block not inserted
             return nullptr;

diff --git a/src/mem/cache/mshr.hh b/src/mem/cache/mshr.hh
index 1f59607bf31d7f38d2fbbf1394da6e16cba14984..5fe0fb92d75664ebcd38b9ed30815b7cafd1da03 100644 (file)
--- a/src/mem/cache/mshr.hh
+++ b/src/mem/cache/mshr.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012-2013, 2015-2016 ARM Limited
+ * Copyright (c) 2012-2013, 2015-2016, 2018 ARM Limited
  * All rights reserved.
  *
  * The license below extends only to copyright in the software and shall
@@ -235,6 +235,11 @@ class MSHR : public QueueEntry, public Printable
     /** True if we need to get a writable copy of the block. */
     bool needsWritable() const { return targets.needsWritable; }
 
+    bool isCleaning() const {
+        PacketPtr pkt = targets.front().pkt;
+        return pkt->isClean();
+    }
+
     bool isPendingModified() const {
         assert(inService); return pendingModified;
     }