*** empty log message ***

From-SVN: r58050

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b49819b387adac7e6c277037dda72f8068c2e361..c2c29c58b03f3ccc9fdbbea5510b0ba5390986fb 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+Fri Oct 11 10:56:17 2002  J"orn Rennecke <joern.rennecke@superh.com>
+
+       * emit-rtl.c (gen_lowpart_common): When asked to make a vector from
+       an integer, use simplify_gen_subreg.
+
 2002-10-10  Aldy Hernandez  <aldyh@redhat.com>
 
        * extend.texi (Vector Extensions): Remove comment about single

diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 889064fd0f9ccdb8955d538d5470e311f6d1585a..2cf410706d8993d431c5bd858773ff192f773ec1 100644 (file)
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -999,6 +999,10 @@ gen_lowpart_common (mode, x)
   else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
           || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR)
     return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
+  else if ((GET_MODE_CLASS (mode) == MODE_VECTOR_INT
+           || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
+          && GET_MODE (x) == VOIDmode)
+    return simplify_gen_subreg (mode, x, int_mode_for_mode (mode), offset);
   /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
      from the low-order part of the constant.  */
   else if ((GET_MODE_CLASS (mode) == MODE_INT

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 78787bc48dec8e112afa3720d5f4632005cdb457..d54efb19c9aa5c5a7aeb49c2587c30eeb6cda16b 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+Fri Oct 11 10:56:49 2002  Richard Shann  <richard.shann@superh.com>
+
+       * gcc.c-torture/compile/simd-5.c: New test.
+
 2002-10-10  Jim Wilson  <wilson@redhat.com>
 
        * gcc.c-torture/execute/20021010-1.c: New test.

diff --git a/gcc/testsuite/gcc.c-torture/compile/simd-5.c b/gcc/testsuite/gcc.c-torture/compile/simd-5.c
new file mode 100644 (file)
index 0000000..016cccd
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/simd-5.c
@@ -0,0 +1,12 @@
+#define vector64 __attribute__((vector_size(8)))
+
+main(){
+
+ vector64 int  c;
+vector64 int a = {1, -1};
+vector64 int b = {2, -2};
+c = -a + b*b*(-1LL);
+/* c is now {5, 3} */
+
+ printf("result is %llx\n", (long long)c); 
+}