intel: Fix Y tiling support for glCopyTexSubImage's alpha override.

Apparently we don't have any piglit tests for this, because it would have
assertion failed in a debug build, or just rendered wrong in a non-debug
build if the destination wasn't covering whole tiles.

v2: Use the new macros.

Reviewed-by: Paul Berry <stereotype441@gmail.com> (v1)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)

diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c
index 1a9fc40edf6648cae687148651ad049a3eb6d550..b36f07007a75b88aa970e8373a67c25b036e37a4 100644 (file)
--- a/src/mesa/drivers/dri/intel/intel_blit.c
+++ b/src/mesa/drivers/dri/intel/intel_blit.c
@@ -724,8 +724,6 @@ intel_set_teximage_alpha_to_one(struct gl_context *ctx,
    CMD = XY_COLOR_BLT_CMD;
    CMD |= XY_BLT_WRITE_ALPHA;
 
-   assert(region->tiling != I915_TILING_Y);
-
 #ifndef I915
    if (region->tiling != I915_TILING_NONE) {
       CMD |= XY_DST_TILED;
@@ -743,7 +741,9 @@ intel_set_teximage_alpha_to_one(struct gl_context *ctx,
       intel_batchbuffer_flush(intel);
    }
 
-   BEGIN_BATCH_BLT(6);
+   bool dst_y_tiled = region->tiling == I915_TILING_Y;
+
+   BEGIN_BATCH_BLT_TILED(6, dst_y_tiled, false);
    OUT_BATCH(CMD | (6 - 2));
    OUT_BATCH(BR13);
    OUT_BATCH((y1 << 16) | x1);
@@ -752,7 +752,7 @@ intel_set_teximage_alpha_to_one(struct gl_context *ctx,
                    I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
                    0);
    OUT_BATCH(0xffffffff); /* white, but only alpha gets written */
-   ADVANCE_BATCH();
+   ADVANCE_BATCH_TILED(dst_y_tiled, false);
 
    intel_batchbuffer_emit_mi_flush(intel);
 }