panfrost/midgard: fpow is a two-part operation
authorAlyssa Rosenzweig <alyssa@rosenzweig.io>
Tue, 26 Mar 2019 04:48:20 +0000 (04:48 +0000)
committerAlyssa Rosenzweig <alyssa@rosenzweig.io>
Tue, 26 Mar 2019 23:36:09 +0000 (23:36 +0000)
In fact, the native "fpow" instruction only does half of it; more work
is needed for the actual instruction. For now, just lower.

Fixes: 1ea42894c ("panfrost/midgard: Implement fpow")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
src/gallium/drivers/panfrost/midgard/helpers.h
src/gallium/drivers/panfrost/midgard/midgard.h
src/gallium/drivers/panfrost/midgard/midgard_compile.c
src/gallium/drivers/panfrost/midgard/midgard_compile.h

index 84db2de84d1d47736f51a26efda5ab7c5b78fa2f..456c3fb5f1e0989a1f31ed634659c3460f7ee3a5 100644 (file)
@@ -234,7 +234,7 @@ static unsigned alu_opcode_props[256] = {
         [midgard_alu_op_frcp]           = UNIT_VLUT,
         [midgard_alu_op_frsqrt]                 = UNIT_VLUT,
         [midgard_alu_op_fsqrt]          = UNIT_VLUT,
-        [midgard_alu_op_fpow]           = UNIT_VLUT,
+        [midgard_alu_op_fpow_pt1]       = UNIT_VLUT,
         [midgard_alu_op_fexp2]          = UNIT_VLUT,
         [midgard_alu_op_flog2]          = UNIT_VLUT,
 
index eab7cb5eec003c5290f95ba0de0ada43630c74d5..59957c1b566b2a7c5b8544c3b048535c688ab055 100644 (file)
@@ -126,7 +126,7 @@ typedef enum {
         midgard_alu_op_fcsel      = 0xC5,
         midgard_alu_op_fround     = 0xC6,
         midgard_alu_op_fatan_pt2  = 0xE8,
-        midgard_alu_op_fpow       = 0xEC,
+        midgard_alu_op_fpow_pt1   = 0xEC,
         midgard_alu_op_frcp       = 0xF0,
         midgard_alu_op_frsqrt     = 0xF2,
         midgard_alu_op_fsqrt      = 0xF3,
@@ -498,7 +498,7 @@ static char *alu_opcode_names[256] = {
         [midgard_alu_op_frcp]       = "frcp",
         [midgard_alu_op_frsqrt]     = "frsqrt",
         [midgard_alu_op_fsqrt]      = "fsqrt",
-        [midgard_alu_op_fpow]       = "fpow",
+        [midgard_alu_op_fpow_pt1]   = "fpow_pt1",
         [midgard_alu_op_fexp2]      = "fexp2",
         [midgard_alu_op_flog2]      = "flog2",
         [midgard_alu_op_fsin]       = "fsin",
index 3dd21d0390d5d1aeebd36019b9647c43dd7ca4f7..4640d921b7b430f6be30f8480ef92b7cacec6dbf 100644 (file)
@@ -1016,7 +1016,6 @@ emit_alu(compiler_context *ctx, nir_alu_instr *instr)
                 ALU_CASE(frcp, frcp);
                 ALU_CASE(frsq, frsqrt);
                 ALU_CASE(fsqrt, fsqrt);
-                ALU_CASE(fpow, fpow);
                 ALU_CASE(fexp2, fexp2);
                 ALU_CASE(flog2, flog2);
 
index a6520091a21327016b0a0698ccc27285b91401c3..a4dfb25648d261c7f736e8b8a0fd3ad9db441080 100644 (file)
@@ -73,6 +73,7 @@ static const nir_shader_compiler_options midgard_nir_options = {
         .lower_fdiv = true,
         .lower_idiv = true,
         .lower_isign = true,
+        .lower_fpow = true,
 
         .vertex_id_zero_based = true,
         .lower_extract_byte = true,