intel/compiler: Always apply sample mask on Vulkan.
authorArcady Goldmints-Orlov <agoldmints@igalia.com>
Fri, 8 May 2020 00:34:56 +0000 (19:34 -0500)
committerArcady Goldmints-Orlov <agoldmints@igalia.com>
Sat, 20 Jun 2020 01:24:11 +0000 (20:24 -0500)
With OpenGL, shader writes to the sample mask are ignored when not
rendering to a multisample render target. However, on Vulkan, writes to
the sample mask have still have their effect in that case.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3016
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5156>

src/gallium/drivers/iris/iris_program.c
src/intel/compiler/brw_compiler.h
src/intel/compiler/brw_fs.cpp
src/intel/vulkan/anv_pipeline.c
src/mesa/drivers/dri/i965/brw_wm.c

index 4790ef34576e13eb2e3b6e837b7607cf96b6edb2..91336dfa2fd8cf878d77b6cc2c6dc1012f06d289 100644 (file)
@@ -125,6 +125,7 @@ iris_to_brw_fs_key(const struct gen_device_info *devinfo,
       .coherent_fb_fetch = key->coherent_fb_fetch,
       .color_outputs_valid = key->color_outputs_valid,
       .input_slots_valid = key->input_slots_valid,
+      .ignore_sample_mask_out = !key->multisample_fbo,
    };
 }
 
index 963d8fa2fc83b278144538431967c2741c0cf3b1..d5ec740225eee26454a2c14576fecdef117002e5 100644 (file)
@@ -457,6 +457,7 @@ struct brw_wm_prog_key {
    bool high_quality_derivatives:1;
    bool force_dual_color_blend:1;
    bool coherent_fb_fetch:1;
+   bool ignore_sample_mask_out:1;
 
    uint8_t color_outputs_valid;
    uint64_t input_slots_valid;
index a41d15270b900b5d6777172d16754ec527ee8d85..d3dc1f45110ce967b85c4d839dec2808321a473c 100644 (file)
@@ -8565,8 +8565,8 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,
     */
    prog_data->uses_kill = shader->info.fs.uses_discard ||
       key->alpha_test_func;
-   prog_data->uses_omask = key->multisample_fbo &&
-      shader->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK);
+   prog_data->uses_omask = !key->ignore_sample_mask_out &&
+      (shader->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK));
    prog_data->computed_depth_mode = computed_depth_mode(shader);
    prog_data->computed_stencil =
       shader->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL);
index 9ddb2ebabeb8eb18e79d31db4d4f98123183ab58..856c018d10ee4c31c0cdc5e656469cf2749ca7be 100644 (file)
@@ -516,6 +516,8 @@ populate_wm_prog_key(const struct gen_device_info *devinfo,
    /* XXX Vulkan doesn't appear to specify */
    key->clamp_fragment_color = false;
 
+   key->ignore_sample_mask_out = false;
+
    assert(subpass->color_count <= MAX_RTS);
    for (uint32_t i = 0; i < subpass->color_count; i++) {
       if (subpass->color_attachments[i].attachment != VK_ATTACHMENT_UNUSED)
index 256115103ddceaf1fdb2f0cffe5b7611ae026cd1..24a23c1bc8e29d2cba7921c3b6fed03227eedf7e 100644 (file)
@@ -490,6 +490,8 @@ brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key)
       key->multisample_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1;
    }
 
+   key->ignore_sample_mask_out = !key->multisample_fbo;
+
    /* BRW_NEW_VUE_MAP_GEOM_OUT */
    if (devinfo->gen < 6 || util_bitcount64(prog->info.inputs_read &
                                              BRW_FS_VARYING_INPUT_MASK) > 16) {