/**
- * Special case to deal with display targets.
+ * Special case to deal with scanout textures.
*/
static boolean
-i915_displaytarget_layout(struct i915_texture *tex)
+i915_scanout_layout(struct i915_texture *tex)
{
struct pipe_texture *pt = &tex->base;
i915_miptree_set_image_offset( tex, 0, 0, 0, 0 );
if (tex->base.width[0] >= 128) {
+#if 0
tex->stride = power_of_two(tex->base.nblocksx[0] * pt->block.size);
+#else
+ tex->stride = 2048 * 4; /* TODO fix when backend is smarter */
+#endif
tex->total_nblocksy = round_up(tex->base.nblocksy[0], 8);
-#if 0 /* used for tiled display targets */
+#if 0 /* used for tiled textures */
tex->tiled = 1;
#endif
} else {
unsigned nblocksx = pt->nblocksx[0];
unsigned nblocksy = pt->nblocksy[0];
- /* used for tiled display targets */
- if (0)
- if (i915_displaytarget_layout(tex))
+ /* used for scanouts that need special layouts */
+ if (tex->base.tex_usage & PIPE_TEXTURE_USAGE_PRIMARY)
+ if (i915_scanout_layout(tex))
return;
tex->stride = round_up(pt->nblocksx[0] * pt->block.size, 4);
struct i915_screen *i915screen = i915_screen(screen);
struct i915_texture *tex = CALLOC_STRUCT(i915_texture);
size_t tex_size;
+ unsigned buf_usage = 0;
if (!tex)
return NULL;
tex_size = tex->stride * tex->total_nblocksy;
- tex->buffer = screen->buffer_create(screen, 64,
- PIPE_BUFFER_USAGE_PIXEL,
- tex_size);
+ buf_usage = PIPE_BUFFER_USAGE_PIXEL;
+ if (templat->tex_usage & PIPE_TEXTURE_USAGE_PRIMARY)
+ buf_usage |= I915_BUFFER_USAGE_SCANOUT;
+
+ tex->buffer = screen->buffer_create(screen, 64, buf_usage, tex_size);
if (!tex->buffer)
goto fail;
#include "intel_be_api.h"
#include <stdio.h>
+#define I915_TILING_X 1
+
/*
* Buffer
*/
struct pipe_buffer *buf,
unsigned flags)
{
+ struct intel_be_buffer *buffer = intel_be_buffer(buf);
drm_intel_bo *bo = intel_bo(buf);
int write = 0;
- int ret;
+ int ret = 0;
if (flags & PIPE_BUFFER_USAGE_DONTBLOCK) {
/* Remove this when drm_intel_bo_map supports DONTBLOCK
if (flags & PIPE_BUFFER_USAGE_CPU_WRITE)
write = 1;
- ret = drm_intel_bo_map(bo, write);
+ if (buffer->map_count)
+ goto out;
+
+ if (buffer->map_gtt)
+ ret = drm_intel_gem_bo_map_gtt(bo);
+ else
+ ret = drm_intel_bo_map(bo, write);
+
+ buffer->ptr = bo->virtual;
+out:
if (ret)
return NULL;
- return bo->virtual;
+ buffer->map_count++;
+ return buffer->ptr;
}
static void
intel_be_buffer_unmap(struct pipe_winsys *winsys,
struct pipe_buffer *buf)
{
- drm_intel_bo_unmap(intel_bo(buf));
+ struct intel_be_buffer *buffer = intel_be_buffer(buf);
+
+ if (--buffer->map_count)
+ return;
+
+ if (buffer->map_gtt)
+ drm_intel_gem_bo_unmap_gtt(intel_bo(buf));
+ else
+ drm_intel_bo_unmap(intel_bo(buf));
}
static void
buffer->base.size = size;
buffer->flinked = FALSE;
buffer->flink = 0;
+ buffer->map_gtt = FALSE;
- if (usage & (PIPE_BUFFER_USAGE_VERTEX | PIPE_BUFFER_USAGE_CONSTANT)) {
+ if (usage & I915_BUFFER_USAGE_SCANOUT) {
+ /* Scanout buffer */
+ name = "gallium3d_scanout";
+ pool = dev->pools.gem;
+ } else if (usage & (PIPE_BUFFER_USAGE_VERTEX | PIPE_BUFFER_USAGE_CONSTANT)) {
/* Local buffer */
name = "gallium3d_local";
pool = dev->pools.gem;
}
buffer->bo = drm_intel_bo_alloc(pool, name, size, alignment);
+ if (usage & I915_BUFFER_USAGE_SCANOUT) {
+ unsigned tiling = I915_TILING_X;
+ unsigned stride = 2048 * 4; /* TODO do something smarter here */
+ drm_intel_bo_set_tiling(buffer->bo, &tiling, stride);
+ buffer->map_gtt = TRUE;
+ }
if (!buffer->bo)
goto err;