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Added English language description for cdtbcd instruction
author
Shriya Sharma
<shriya@redsemiconductor.com>
Wed, 22 Nov 2023 14:02:28 +0000
(14:02 +0000)
committer
Shriya Sharma
<shriya@redsemiconductor.com>
Wed, 22 Nov 2023 14:02:28 +0000
(14:02 +0000)
openpower/isa/bcd.mdwn
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diff --git
a/openpower/isa/bcd.mdwn
b/openpower/isa/bcd.mdwn
index 3707692f55e146d493b451ad8987d9c5820f7832..81b96158ebb443abbb7dbd6b02b8d8cc96976b06 100644
(file)
--- a/
openpower/isa/bcd.mdwn
+++ b/
openpower/isa/bcd.mdwn
@@
-25,6
+25,14
@@
Pseudo-code:
result[n+20:n+31] <- DPD_TO_BCD(src[n+22:n+31])
RA <- result[64-XLEN:63]
+Description:
+
+ The low-order 20 bits of each word of register RS con-
+ tain two declets which are converted to six, 4-bit BCD
+ fields; each set of six, 4-bit BCD fields is placed into the
+ low-order 24 bits of the corresponding word in RA. The
+ high-order 8 bits in each word of RA are set to 0.
+
Special Registers Altered:
None