#ifdef INSN_TYPE_BRANCH
reg_t target_pred = ~0x0;
bool zeroingtarg = false;
+ bool invtarg = false;
#endif
sv_insn_t insn(p, sv_enabled, bits, floatintmap, xlen,
INSN_SRC_FLEN, INSN_DEST_FLEN,
_target_reg = r->regidx;
target_reg = &_target_reg;
#ifdef INSN_TYPE_C_BRANCH
- insn.predicate(0, true, zeroingtarg);
+ target_pred = insn.predicate(0, true, zeroingtarg, invtarg);
#else
- insn.predicate(s_insn.rs2(), true, zeroingtarg);
+ target_pred = insn.predicate(s_insn.rs2(), true, zeroingtarg, invtarg);
#endif
fprintf(stderr, "branch pred reg %ld pred %lx\n",
_target_reg, target_pred);