rs6000: Fix more testsuite fallout from rs6000_legitimate_address_p() fix. [PR93913]
authorPeter Bergner <bergner@linux.ibm.com>
Wed, 26 Feb 2020 17:58:08 +0000 (11:58 -0600)
committerPeter Bergner <bergner@linux.ibm.com>
Wed, 26 Feb 2020 17:58:08 +0000 (11:58 -0600)
PR target/93913
* gcc.target/powerpc/fold-vec-st-char.c (scan-assembler-times): Allow
stxv and stxvx instructions as well.
* gcc.target/powerpc/fold-vec-st-float.c: Likewise.
* gcc.target/powerpc/fold-vec-st-int.c: Likewise.
* gcc.target/powerpc/fold-vec-st-short.c: Likewise.

gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/powerpc/fold-vec-st-char.c
gcc/testsuite/gcc.target/powerpc/fold-vec-st-float.c
gcc/testsuite/gcc.target/powerpc/fold-vec-st-int.c
gcc/testsuite/gcc.target/powerpc/fold-vec-st-short.c

index 662ffbfd11e09a3c36ca94b2da634c1c5863381d..79a868e8957813ae1afaad4999ac9928af7abaf7 100644 (file)
@@ -1,3 +1,12 @@
+2020-02-26  Peter Bergner  <bergner@linux.ibm.com>
+
+       PR target/93913
+       * gcc.target/powerpc/fold-vec-st-char.c (scan-assembler-times): Allow
+       stxv and stxvx instructions as well.
+       * gcc.target/powerpc/fold-vec-st-float.c: Likewise.
+       * gcc.target/powerpc/fold-vec-st-int.c: Likewise.
+       * gcc.target/powerpc/fold-vec-st-short.c: Likewise.
+
 2020-02-26  Patrick Palka  <ppalka@redhat.com>
 
        * g++.dg/concepts/diagnostic2.C: New test.
index 4c4582780c22ec2b3efae2bef539de18ede27e78..d8de63fdeba60ce0c22a7077c1376c2fc032b42b 100644 (file)
@@ -91,4 +91,4 @@ testst_cst7 (vector bool char vbc1, int i1, signed char * vscp)
        return vec_st(vbc1, 36, vscp);
 }
 
-/* { dg-final { scan-assembler-times {\mstvx\M} 14 } } */
+/* { dg-final { scan-assembler-times {\m(?:stvx|stxv|stxvx)\M} 14 } } */
index 5a8fc6670a6953af40ffe76f5d704bfd7cd799dc..61780fb308b295680ec087ece219a82769b504f3 100644 (file)
@@ -31,4 +31,4 @@ testst_cst2 (vector float vf1, int i1, float * fp)
        return vec_st(vf1, 24, fp);
 }
 
-/* { dg-final { scan-assembler-times {\mstvx\M}  4 } } */
+/* { dg-final { scan-assembler-times {\m(?:stvx|stxv|stxvx)\M} 4 } } */
index 4db35f0dd945c2686c4ab3d603499e5aa5bfde50..4155a8f130f821001539cb199f74f364d585e90d 100644 (file)
@@ -80,5 +80,5 @@ testst_cst7 (vector bool int vbi1, int i1, signed int * vsip)
        return vec_st(vbi1, 36, vsip);
 }
 
-/* { dg-final { scan-assembler-times {\mstvx\M}  14 } } */
+/* { dg-final { scan-assembler-times {\m(?:stvx|stxv|stxvx)\M} 14 } } */
 
index ba8397eef263d5a6ded67bc662fde787cb452676..d9b7a0754a67d4afcd21bba19054123782d95594 100644 (file)
@@ -80,4 +80,4 @@ testst_cst7 (vector bool short vbs1, int i1, signed short * vssp)
        return vec_st(vbs1, 36, vssp);
 }
 
-/* { dg-final { scan-assembler-times {\mstvx\M} 14} } */
+/* { dg-final { scan-assembler-times {\m(?:stvx|stxv|stxvx)\M} 14} } */