+Mon May 13 11:29:37 1996 Stan Shebs <shebs@andros.cygnus.com>
+
+ SH3-E support from Allan Tajii <atajii@hmsi.com>:
+ * sh-tdep.c (sh_reg_names, sh3_reg_names): Add empty names for
+ float registers.
+ (sh3e_reg_names): New register name array.
+ (sh_processor_type_table): Add sh3e processor type.
+ * config/sh/tm-sh.h (REGISTER_VIRTUAL_TYPE): Fix test.
+ (REGISTER_NAMES, NUM_REGS, NUM_REALREGS, etc): Adjust for
+ full set of registers.
+ * remote-e7000.c (want_sh3, want_sh3_nopc): New globals.
+ (e7000_fetch_registers, e7000_wait): Use them.
+ * sh3-rom.c (sh3_regnames): Add float registers.
+ (sh3e_cmds, sh3e_ops): New globals.
+ (sh3e_open): New function.
+ (_initialize_sh3_rom): Rename from _initialize_sh3, set up
+ sh3e target vector.
+
Fri May 10 15:53:38 1996 Stu Grossman (grossman@lisa.cygnus.com)
* sol-thread.c: Cleanup. gcc -Wall fixes. Add prototypes.
of data in register N. */
#define REGISTER_VIRTUAL_TYPE(N) \
- ((((N) >= FP0_REGNUM && (N) < FP15_REGNUM) \
+ ((((N) >= FP0_REGNUM && (N) <= FP15_REGNUM) \
|| (N) == FPUL_REGNUM) \
? builtin_type_float : builtin_type_int)
{"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
"r8", "r9", "r10","r11","r12", "r13", "r14","r15",\
"pc", "pr", "gbr","vbr","mach","macl","sr", \
+ "ssr", "spc", \
+ "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", \
+ "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", \
"fpul","fpscr", \
"fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", \
- "fr8", "fr9", "fr10","fr11","fr12","fr13","fr14","fr15",\
- "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", \
- "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1" \
+ "fr8", "fr9", "fr10","fr11","fr12","fr13","fr14","fr15"\
}
-#define NUM_REGS 57
+#define NUM_REGS 59
/* Register numbers of various important registers.
Note that some of these values are "real" register numbers,
#define MACL_REGNUM 21
#define SR_REGNUM 22
#define NUM_REALREGS 23
-#define FPUL_REGNUM 23
-#define FP0_REGNUM 25
-#define FP15_REGNUM 41
+#define FPUL_REGNUM 41
+#define FP0_REGNUM 43
+#define FP15_REGNUM 58
#undef NUM_REALREGS
-#define NUM_REALREGS 57
+#define NUM_REALREGS 59
/* Store the address of the place in which to copy the structure the
subroutine will return. This is called from call_function.
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
"pc", "pr", "gbr", "vbr", "mach","macl", "sr",
- "fpul", "fpscr",
+ "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
+ "","",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", ""
};
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
"pc", "pr", "gbr", "vbr", "mach","macl","sr",
+ "ssr", "spc",
+ "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
+ "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
+ "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", ""
+};
+
+char *sh3e_reg_names[] = {
+ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+ "pc", "pr", "gbr", "vbr", "mach","macl","sr",
+ "ssr", "spc",
+ "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
+ "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
"fpul", "fpscr",
"fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
- "fr8", "fr9", "fr10","fr11","fr12","fr13","fr14","fr15",
- "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
- "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
+ "fr8", "fr9", "fr10","fr11","fr12","fr13","fr14","fr15"
};
struct {
} sh_processor_type_table[] = {
{ "sh", sh_reg_names },
{ "sh3", sh3_reg_names },
+ { "sh3e", sh3e_reg_names },
{ NULL, NULL }
};
than does GDB, and don't necessarily support all the registers
either. So, typing "info reg sp" becomes a "r30". */
+
static char *sh3_regnames[NUM_REGS] = {
"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
"R8", "R9", "R10", "R11","R12", "R13", "R14", "R15",
"PC", "PR", "GBR", "VBR","MACH","MACL", "SR",
+ "SSR", "SPC",
+ "R0_BANK0", "R1_BANK0", "R2_BANK0", "R3_BANK0",
+ "R4_BANK0", "R5_BANK0", "R6_BANK0", "R7_BANK0",
+ "R0_BANK1", "R1_BANK1", "R2_BANK1", "R3_BANK1",
+ "R4_BANK1", "R5_BANK1", "R6_BANK1", "R7_BANK1",
NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL
+};
+
+static char *sh3e_regnames[NUM_REGS] = {
+ "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
+ "R8", "R9", "R10", "R11","R12", "R13", "R14", "R15",
+ "PC", "PR", "GBR", "VBR","MACH","MACL", "SR",
+ "SSR","SPC",
"R0_BANK0", "R1_BANK0", "R2_BANK0", "R3_BANK0",
"R4_BANK0", "R5_BANK0", "R6_BANK0", "R7_BANK0",
"R0_BANK1", "R1_BANK1", "R2_BANK1", "R3_BANK1",
- "R4_BANK1", "R5_BANK1", "R6_BANK1", "R7_BANK1"
+ "R4_BANK1", "R5_BANK1", "R6_BANK1", "R7_BANK1",
+ "FPUL", "FPSCR",
+ "FR0", "FR1", "FR2", "FR3", "FR4", "FR5", "FR6", "FR7",
+ "FR8", "FR9", "FR10", "FR11", "FR12", "FR13", "FR14", "FR15"
};
/* Define the monitor command strings. Since these are passed directly
through to a printf style function, we may include formatting
strings. We also need a CR or LF on the end. */
-static struct target_ops sh3_ops;
+static struct target_ops sh3_ops, sh3e_ops;
static char *sh3_inits[] = {"\003", NULL}; /* Exits sub-command mode & download cmds */
MONITOR_OPS_MAGIC /* magic */
};
+/* This monitor structure is identical except for a couple slots, so
+ we will fill it in from the base structure when needed. */
+
+static struct monitor_ops sh3e_cmds;
+
static void
sh3_open (args, from_tty)
char *args;
}
+static void
+sh3e_open (args, from_tty)
+ char *args;
+ int from_tty;
+{
+ char *serial_port_name = args;
+ char *parallel_port_name = 0;
+
+ if (args)
+ {
+ char *cursor = serial_port_name = strsave (args);
+
+ while (*cursor && *cursor != ' ')
+ cursor++;
+
+ if (*cursor)
+ *cursor++ = 0;
+
+ while (*cursor == ' ')
+ cursor++;
+
+ if (*cursor)
+ parallel_port_name = cursor;
+ }
+
+ /* Set up the SH-3E monitor commands structure. */
+
+ memcpy (&sh3e_cmds, &sh3_cmds, sizeof (struct monitor_ops));
+
+ sh3e_cmds.target = &sh3e_ops;
+ sh3e_cmds.regnames = sh3e_regnames;
+
+ monitor_open (serial_port_name, &sh3e_cmds, from_tty);
+
+ if (parallel_port_name)
+ {
+ parallel = SERIAL_OPEN (parallel_port_name);
+
+ if (!parallel)
+ perror_with_name ("Unable to open parallel port.");
+
+ parallel_in_use = 1;
+ }
+
+ /* If we connected successfully, we know the processor is an SH3E. */
+ sh_set_processor_type ("sh3e");
+}
+
static void
sh3_close (quitting)
int quitting;
}
void
-_initialize_sh3 ()
+_initialize_sh3_rom ()
{
init_monitor_ops (&sh3_ops);
sh3_ops.to_close = sh3_close;
add_target (&sh3_ops);
+
+ /* Setup the SH3e, which has float registers. */
+
+ init_monitor_ops (&sh3e_ops);
+
+ sh3e_ops.to_shortname = "sh3e";
+ sh3e_ops.to_longname = "Hitachi SH-3E rom monitor";
+
+ sh3e_ops.to_doc =
+#ifdef _WINDOWS
+ /* On windows we can talk through the parallel port too. */
+ "Debug on a Hitachi eval board running the SH-3E rom monitor.\n"
+ "Specify the serial device it is connected to (e.g. com2).\n"
+ "If you want to use the parallel port to download to it, specify that\n"
+ "as the second argument. (e.g. lpt1)";
+#else
+ "Debug on a Hitachi eval board running the SH-3E rom monitor.\n\
+Specify the serial device it is connected to (e.g. /dev/ttya).";
+#endif
+
+ sh3e_ops.to_open = sh3e_open;
+ sh3e_ops.to_close = sh3_close;
+
+ add_target (&sh3e_ops);
}