+2016-05-27 Ilya Enkovich <ilya.enkovich@intel.com>
+
+ PR middle-end/71279
+ * fold-const.c (fold_ternary_loc): Don't fold VEC_COND_EXPR
+ into comparison.
+
2016-05-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64-modes.def (CC_ZESWP, CC_SESWP): Delete.
/* Convert A ? 0 : 1 to !A. This prefers the use of NOT_EXPR
over COND_EXPR in cases such as floating point comparisons. */
if (integer_zerop (op1)
- && (code == VEC_COND_EXPR ? integer_all_onesp (op2)
- : (integer_onep (op2)
- && !VECTOR_TYPE_P (type)))
+ && code == COND_EXPR
+ && integer_onep (op2)
+ && !VECTOR_TYPE_P (type)
&& truth_value_p (TREE_CODE (arg0)))
return pedantic_non_lvalue_loc (loc,
fold_convert_loc (loc, type,
+2016-05-27 Ilya Enkovich <ilya.enkovich@intel.com>
+
+ PR middle-end/71279
+ * gcc.dg/pr71279.c: New test.
+
2016-05-26 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/p9-minmax-1.c: New tests for ISA 3.0
--- /dev/null
+/* PR middle-end/71279 */
+/* { dg-do compile } */
+/* { dg-options "-O3" } */
+/* { dg-additional-options "-march=knl" { target { i?86-*-* x86_64-*-* } } } */
+
+extern int a, b;
+long c[1][1][1];
+long d[1][1];
+
+void fn1 ()
+{
+ for (int e = 0; e < b; e = e + 1)
+ *(e + **c) = (a && *d[1]) - 1;
+}