actual_in = 0;
for (i = 0; i < so->inputs_count; i++) {
unsigned j, regid = ~0, compmask = 0;
+ so->inputs[i].ncomp = 0;
for (j = 0; j < 4; j++) {
struct ir3_instruction *in = inputs[(i*4) + j];
if (in) {
compmask |= (1 << j);
regid = in->regs[0]->num - j;
actual_in++;
+ so->inputs[i].ncomp++;
}
}
so->inputs[i].regid = regid;
so->inputs[n].semantic = decl_semantic(&decl->Semantic);
so->inputs[n].compmask = (1 << ncomp) - 1;
+ so->inputs[n].ncomp = ncomp;
so->inputs[n].regid = r;
so->inputs[n].inloc = ctx->next_inloc;
so->inputs[n].bary = true; /* all that is supported */
struct fd3_vertex_buf *vbufs, uint32_t n)
{
uint32_t i, j, last = 0;
+ uint32_t total_in = 0;
n = MIN2(n, vp->inputs_count);
A3XX_VFD_DECODE_INSTR_LASTCOMPVALID |
COND(switchnext, A3XX_VFD_DECODE_INSTR_SWITCHNEXT));
+ total_in += vp->inputs[i].ncomp;
j++;
}
}
OUT_PKT0(ring, REG_A3XX_VFD_CONTROL_0, 2);
- OUT_RING(ring, A3XX_VFD_CONTROL_0_TOTALATTRTOVS(vp->total_in) |
+ OUT_RING(ring, A3XX_VFD_CONTROL_0_TOTALATTRTOVS(total_in) |
A3XX_VFD_CONTROL_0_PACKETSIZE(2) |
A3XX_VFD_CONTROL_0_STRMDECINSTRCNT(j) |
A3XX_VFD_CONTROL_0_STRMFETCHINSTRCNT(j));