if (length == VIRGL_DRAW_VBO_SIZE_INDIRECT) {
virgl_encoder_write_res(ctx, virgl_resource(info->indirect->buffer));
virgl_encoder_write_dword(ctx->cbuf, info->indirect->offset);
- virgl_encoder_write_dword(ctx->cbuf, 0); /* indirect stride */
- virgl_encoder_write_dword(ctx->cbuf, 0); /* indirect draw count */
- virgl_encoder_write_dword(ctx->cbuf, 0); /* indirect draw count offset */
- virgl_encoder_write_dword(ctx->cbuf, 0); /* indirect draw count handle */
+ virgl_encoder_write_dword(ctx->cbuf, info->indirect->stride); /* indirect stride */
+ virgl_encoder_write_dword(ctx->cbuf, info->indirect->draw_count); /* indirect draw count */
+ virgl_encoder_write_dword(ctx->cbuf, info->indirect->indirect_draw_count_offset); /* indirect draw count offset */
+ if (info->indirect->indirect_draw_count)
+ virgl_encoder_write_res(ctx, virgl_resource(info->indirect->indirect_draw_count));
+ else
+ virgl_encoder_write_dword(ctx->cbuf, 0); /* indirect draw count handle */
}
return 0;
}
#define VIRGL_CAP_FBO_MIXED_COLOR_FORMATS (1 << 18)
#define VIRGL_CAP_FAKE_FP64 (1 << 19)
#define VIRGL_CAP_BIND_COMMAND_ARGS (1 << 20)
+#define VIRGL_CAP_MULTI_DRAW_INDIRECT (1 << 21)
#define VIRGL_CAP_TRANSFORM_FEEDBACK3 (1 << 23)
/* virgl bind flags - these are compatible with mesa 10.5 gallium.
/* If the host supports only one sample (e.g., if it is using softpipe),
* fake multisampling to able to advertise higher GL versions. */
return (vscreen->caps.caps.v1.max_samples == 1) ? 1 : 0;
+ case PIPE_CAP_MULTI_DRAW_INDIRECT:
+ return !!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_MULTI_DRAW_INDIRECT);
case PIPE_CAP_TEXTURE_GATHER_SM5:
case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
- case PIPE_CAP_MULTI_DRAW_INDIRECT:
case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
case PIPE_CAP_CLIP_HALFZ:
case PIPE_CAP_VERTEXID_NOBASE: