It turns out the MI_LOAD_REGISTER_IMM approach doesn't work on Haswell,
and regressed essentially all the transform feedback Piglit tests.
This morally reverts
eaa6fbe6d54dc99efac4ab8e800edef65ce8220d. However,
the code is still simpler than it was. On BeginTransformFeedback, we
simply flush the batch and set the SOL reset flag so that the next batch
will start with zeroed offsets. There's still no software counting.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64887
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
struct brw_context *brw = brw_context(ctx);
struct intel_context *intel = &brw->intel;
- /* Reset the SOL buffer offset register. */
- for (int i = 0; i < 4; i++) {
- BEGIN_BATCH(3);
- OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2));
- OUT_BATCH(GEN7_SO_WRITE_OFFSET(i));
- OUT_BATCH(0);
- ADVANCE_BATCH();
- }
+ intel_batchbuffer_flush(intel);
+ intel->batch.needs_sol_reset = true;
}
void
intel->batch.reserved_space = BATCH_RESERVED;
intel->batch.state_batch_offset = intel->batch.bo->size;
intel->batch.used = 0;
+ intel->batch.needs_sol_reset = false;
}
void
flags = I915_EXEC_BLT;
}
+ if (batch->needs_sol_reset)
+ flags |= I915_EXEC_GEN7_SOL_RESET;
+
if (ret == 0) {
if (unlikely(INTEL_DEBUG & DEBUG_AUB) && intel->vtbl.annotate_aub)
intel->vtbl.annotate_aub(intel);
uint32_t state_batch_offset;
bool is_blit;
+ bool needs_sol_reset;
struct {
uint16_t used;