re PR target/7842 ([REGRESSION] sparc code gen bug)
authorDavid S. Miller <davem@redhat.com>
Thu, 26 Sep 2002 10:16:44 +0000 (03:16 -0700)
committerDavid S. Miller <davem@gcc.gnu.org>
Thu, 26 Sep 2002 10:16:44 +0000 (03:16 -0700)
2002-09-25  David S. Miller  <davem@redhat.com>

PR target/7842
* gcc.c-torture/execute/shiftdi.c: New test.

From-SVN: r57533

gcc/testsuite/ChangeLog
gcc/testsuite/gcc.c-torture/execute/shiftdi.c [new file with mode: 0644]

index 8be94f028d9fd481b936a8d3798a84cebb9fc84e..8d5d331e8f7ab0f30870766fd386cf6386b58209 100644 (file)
@@ -1,3 +1,8 @@
+2002-09-25  David S. Miller  <davem@redhat.com>
+
+       PR target/7842
+       * gcc.c-torture/execute/shiftdi.c: New test.
+
 2002-09-26  Richard Earnshaw  <rearnsha@arm.com>
 
        * lib/gcc.exp (gcc_init): Use a filename for the testglue that is
diff --git a/gcc/testsuite/gcc.c-torture/execute/shiftdi.c b/gcc/testsuite/gcc.c-torture/execute/shiftdi.c
new file mode 100644 (file)
index 0000000..44f0dfc
--- /dev/null
@@ -0,0 +1,20 @@
+/* Failed on sparc with -mv8plus because sparc.c:set_extends() thought
+   erroneously that SImode ASHIFT chops the upper bits, it does not.  */
+
+typedef unsigned long long uint64;
+
+void g(uint64 x, int y, int z, uint64 *p)
+{
+       unsigned w = ((x >> y) & 0xffffffffULL) << (z & 0x1f);
+       *p |= (w & 0xffffffffULL) << z;
+}
+
+int main(void)
+{
+       uint64 a = 0;
+       g(0xdeadbeef01234567ULL, 0, 0, &a);
+       return (a == 0x01234567) ? 0 : 1;
+}
+
+
+