ilang, ast: Store parameter order and default value information.

Fixes #1819, #1820.

diff --git a/backends/ilang/ilang_backend.cc b/backends/ilang/ilang_backend.cc
index 5445fad901bb407d7f423d6b23148e777d422c5d..6e3882d2d02f91fc30ad2cbdd5c5cafc71ebe418 100644 (file)
--- a/backends/ilang/ilang_backend.cc
+++ b/backends/ilang/ilang_backend.cc
@@ -290,8 +290,16 @@ void ILANG_BACKEND::dump_module(std::ostream &f, std::string indent, RTLIL::Modu
                if (!module->avail_parameters.empty()) {
                        if (only_selected)
                                f << stringf("\n");
-                       for (auto &p : module->avail_parameters)
-                               f << stringf("%s" "  parameter %s\n", indent.c_str(), p.c_str());
+                       for (const auto &p : module->avail_parameters) {
+                               const auto &it = module->parameter_default_values.find(p);
+                               if (it == module->parameter_default_values.end()) {
+                                       f << stringf("%s" "  parameter %s\n", indent.c_str(), p.c_str());
+                               } else {
+                                       f << stringf("%s" "  parameter %s ", indent.c_str(), p.c_str());
+                                       dump_const(f, it->second);
+                                       f << stringf("\n");
+                               }
+                       }
                }
        }
 

diff --git a/frontends/ast/ast.cc b/frontends/ast/ast.cc
index 9ddd538b5e104d56d4b2ed67eb4125face1c93e0..73355662172621895098a9cbd9c5a9374997c66f 100644 (file)
--- a/frontends/ast/ast.cc
+++ b/frontends/ast/ast.cc
@@ -1074,8 +1074,6 @@ static AstModule* process_module(AstNode *ast, bool defer, AstNode *original_ast
                                if (child->type == AST_WIRE && (child->is_input || child->is_output)) {
                                        new_children.push_back(child);
                                } else if (child->type == AST_PARAMETER) {
-                                       child->delete_children();
-                                       child->children.push_back(AstNode::mkconst_int(0, false, 0));
                                        new_children.push_back(child);
                                } else if (child->type == AST_CELL && child->children.size() > 0 && child->children[0]->type == AST_CELLTYPE &&
                                                (child->children[0]->str == "$specify2" || child->children[0]->str == "$specify3" || child->children[0]->str == "$specrule")) {

diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc
index ff3f5b84cae981877f504dd85af98a71e9d070e5..d35335747e4c5e7fb02380849ae7eb261d7153b0 100644 (file)
--- a/frontends/ast/genrtlil.cc
+++ b/frontends/ast/genrtlil.cc
@@ -1015,7 +1015,10 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
 
        // remember the parameter, needed for example in techmap
        case AST_PARAMETER:
-               current_module->avail_parameters.insert(str);
+               current_module->avail_parameters(str);
+               if (GetSize(children) >= 1 && children[0]->type == AST_CONSTANT) {
+                       current_module->parameter_default_values[str] = children[0]->asParaConst();
+               }
                /* fall through */
        case AST_LOCALPARAM:
                if (flag_pwires)

diff --git a/frontends/ilang/ilang_parser.y b/frontends/ilang/ilang_parser.y
index 0522fa72acd48e9362c3267161e19532b7058953..8e21fb176a82db8f5e0833fbe785b273f3c9b27d 100644 (file)
--- a/frontends/ilang/ilang_parser.y
+++ b/frontends/ilang/ilang_parser.y
@@ -143,11 +143,18 @@ module_body:
        /* empty */;
 
 module_stmt:
-       param_stmt | attr_stmt | wire_stmt | memory_stmt | cell_stmt | proc_stmt | conn_stmt;
+       param_stmt | param_defval_stmt | attr_stmt | wire_stmt | memory_stmt | cell_stmt | proc_stmt | conn_stmt;
 
 param_stmt:
        TOK_PARAMETER TOK_ID EOL {
-               current_module->avail_parameters.insert($2);
+               current_module->avail_parameters($2);
+               free($2);
+       };
+
+param_defval_stmt:
+       TOK_PARAMETER TOK_ID constant EOL {
+               current_module->avail_parameters($2);
+               current_module->parameter_default_values[$2] = *$3;
                free($2);
        };
 

diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index 8af941c85e19889b44c088cf074fb3409ebfc7d0..0e934726765acba8da125627905328d090aaa8a7 100644 (file)
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -1389,7 +1389,7 @@ void RTLIL::Module::sort()
 {
        wires_.sort(sort_by_id_str());
        cells_.sort(sort_by_id_str());
-       avail_parameters.sort(sort_by_id_str());
+       parameter_default_values.sort(sort_by_id_str());
        memories.sort(sort_by_id_str());
        processes.sort(sort_by_id_str());
        for (auto &it : cells_)
@@ -1508,6 +1508,7 @@ void RTLIL::Module::cloneInto(RTLIL::Module *new_mod) const
        log_assert(new_mod->refcount_cells_ == 0);
 
        new_mod->avail_parameters = avail_parameters;
+       new_mod->parameter_default_values = parameter_default_values;
 
        for (auto &conn : connections_)
                new_mod->connect(conn);

diff --git a/kernel/rtlil.h b/kernel/rtlil.h
index f3b1c9ae717bbfc2742c95a591133b32e8c484c6..11c45bbec77904615e85d669cfd5b2a181fb1bcb 100644 (file)
--- a/kernel/rtlil.h
+++ b/kernel/rtlil.h
@@ -1091,7 +1091,8 @@ public:
        std::vector<RTLIL::SigSig> connections_;
 
        RTLIL::IdString name;
-       pool<RTLIL::IdString> avail_parameters;
+       idict<RTLIL::IdString> avail_parameters;
+       dict<RTLIL::IdString, RTLIL::Const> parameter_default_values;
        dict<RTLIL::IdString, RTLIL::Memory*> memories;
        dict<RTLIL::IdString, RTLIL::Process*> processes;