Fix gcc warning of potentially uninitialised
authorEddie Hung <eddie@fpgeh.com>
Fri, 21 Jun 2019 04:53:27 +0000 (21:53 -0700)
committerEddie Hung <eddie@fpgeh.com>
Fri, 21 Jun 2019 04:53:27 +0000 (21:53 -0700)
passes/techmap/abc9.cc

index 3f7efa800c37373d4f5244ae110fdafcba3bbf62..b904b66c1ee1bad0cbcb8ed31bd599c4c03afa3d 100644 (file)
@@ -522,7 +522,7 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *current_module, std::stri
                for (auto c : mapped_mod->cells())
                {
                        if (c->type == "$_NOT_") {
-                               RTLIL::Cell *cell;
+                               RTLIL::Cell *cell = nullptr;
                                RTLIL::SigBit a_bit = c->getPort("\\A").as_bit();
                                RTLIL::SigBit y_bit = c->getPort("\\Y").as_bit();
                                if (!a_bit.wire) {
@@ -576,7 +576,7 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *current_module, std::stri
                                        cell->setPort("\\Y", RTLIL::SigBit(module->wires_[remap_name(y_bit.wire->name)], y_bit.offset));
                                        cell_stats[RTLIL::unescape_id(c->type)]++;
                                }
-                               if (markgroups) cell->attributes["\\abcgroup"] = map_autoidx;
+                               if (cell && markgroups) cell->attributes["\\abcgroup"] = map_autoidx;
                                continue;
                        }
                        cell_stats[RTLIL::unescape_id(c->type)]++;