cxxrtl: make ROMs writable, document memory::operator[].

There is no practical benefit from using `const memory` for ROMs;
it uses an std::vector internally, which prevents contemporary
compilers from constant-propagating ROM contents. (It is not clear
whether they are permitted to do so.)

However, there is a major benefit from using non-const `memory` for
ROMs, which is the ability to dynamically fill the ROM for each
individual simulation.

diff --git a/backends/cxxrtl/cxxrtl.cc b/backends/cxxrtl/cxxrtl.cc
index 8f7f9d7a3101fb94c75ea3e82f23dc63adf40402..e4fa430f398725f3441c647eb4fcedd9842b6f50 100644 (file)
--- a/backends/cxxrtl/cxxrtl.cc
+++ b/backends/cxxrtl/cxxrtl.cc
@@ -1166,8 +1166,7 @@ struct CxxrtlWorker {
                });
 
                dump_attrs(memory);
-               f << indent << (writable_memories[memory] ? "" : "const ")
-                           << "memory<" << memory->width << "> " << mangle(memory)
+               f << indent << "memory<" << memory->width << "> " << mangle(memory)
                            << " { " << memory->size << "u";
                if (init_cells.empty()) {
                        f << " };\n";

diff --git a/backends/cxxrtl/cxxrtl.h b/backends/cxxrtl/cxxrtl.h
index 593c31c289b61059ba5e891ce7f1fb616377e4b4..fd390db7924beb5de8e4e6d2a568a8696d92a990 100644 (file)
--- a/backends/cxxrtl/cxxrtl.h
+++ b/backends/cxxrtl/cxxrtl.h
@@ -604,12 +604,15 @@ struct memory {
                auto _ = {std::move(std::begin(init.data), std::end(init.data), data.begin() + init.offset)...};
        }
 
-       value<Width> &operator [](size_t index) {
+       // An operator for direct memory reads. May be used at any time during the simulation.
+       const value<Width> &operator [](size_t index) const {
                assert(index < data.size());
                return data[index];
        }
 
-       const value<Width> &operator [](size_t index) const {
+       // An operator for direct memory writes. May only be used before the simulation is started. If used
+       // after the simulation is started, the design may malfunction.
+       value<Width> &operator [](size_t index) {
                assert(index < data.size());
                return data[index];
        }