(no commit message)

diff --git a/openpower/sv/overview.mdwn b/openpower/sv/overview.mdwn
index 758a64260da05968944f741c23be38ef0118b005..28ca22659b0713605b1dd18caec7b75048e44193 100644 (file)
--- a/openpower/sv/overview.mdwn
+++ b/openpower/sv/overview.mdwn
@@ -267,7 +267,7 @@ effectively the same as "no predicate".
 
     function op_add(RT, RA, RB) # add not VADD!
       int id=0, irs1=0, irs2=0;
-      predval = get_pred_val(FALSE, rd);
+      predval = get_pred_val(FALSE, RT); # dest mask
       for i = 0 to VL-1:
         if (predval & 1<<i) # predication bit test
            ireg[RT+id] <= ireg[RA+irs1] + ireg[RB+irs2];