* rtl.h (STORE_FLAG_VALUE): Remove default definition from here.
* defaults.h (STORE_FLAG_VALUE): Move default definition to here.
* doc/tm.texi (STORE_FLAG_VALUE): Document the default value.
* config/alpha/alpha.h (STORE_FLAG_VALUE): Remove definition.
* config/arc/arc.h (STORE_FLAG_VALUE): Likewise.
* config/arm/arm.h (STORE_FLAG_VALUE): Likewise.
* config/cris/cris.h (STORE_FLAG_VALUE): Likewise.
* config/i370/i370.h (STORE_FLAG_VALUE): Likewise.
* config/i386/i386.h (STORE_FLAG_VALUE): Likewise.
* config/i960/i960.h (STORE_FLAG_VALUE): Likewise.
* config/ia64/ia64.h (STORE_FLAG_VALUE): Likewise.
* config/ip2k/ip2k.h (STORE_FLAG_VALUE): Likewise.
* config/m32r/m32r.h (STORE_FLAG_VALUE): Likewise.
* config/mcore/mcore.h (STORE_FLAG_VALUE): Likewise.
* config/mips/mips.h (STORE_FLAG_VALUE): Likewise.
* config/mmix/mmix.h (STORE_FLAG_VALUE): Likewise.
* config/ns32k/ns32k.h (STORE_FLAG_VALUE): Likewise.
* config/pa/pa.h (STORE_FLAG_VALUE): Likewise.
* config/pdp11/pdp11.h (STORE_FLAG_VALUE): Likewise.
* config/sh/sh.h (STORE_FLAG_VALUE): Likewise.
* config/sparc/sparc.h (STORE_FLAG_VALUE): Likewise.
* config/v850/v850.h (STORE_FLAG_VALUE): Likewise.
* config/xtensa/xtensa.h (STORE_FLAG_VALUE): Likewise.
Co-Authored-By: Zack Weinberg <zack@codesourcery.com>
From-SVN: r67957
+2003-06-14 Roger Sayle <roger@eyesopen.com>
+ Zack Weinberg <zack@codesourcery.com>
+
+ * rtl.h (STORE_FLAG_VALUE): Remove default definition from here.
+ * defaults.h (STORE_FLAG_VALUE): Move default definition to here.
+ * doc/tm.texi (STORE_FLAG_VALUE): Document the default value.
+
+ * config/alpha/alpha.h (STORE_FLAG_VALUE): Remove definition.
+ * config/arc/arc.h (STORE_FLAG_VALUE): Likewise.
+ * config/arm/arm.h (STORE_FLAG_VALUE): Likewise.
+ * config/cris/cris.h (STORE_FLAG_VALUE): Likewise.
+ * config/i370/i370.h (STORE_FLAG_VALUE): Likewise.
+ * config/i386/i386.h (STORE_FLAG_VALUE): Likewise.
+ * config/i960/i960.h (STORE_FLAG_VALUE): Likewise.
+ * config/ia64/ia64.h (STORE_FLAG_VALUE): Likewise.
+ * config/ip2k/ip2k.h (STORE_FLAG_VALUE): Likewise.
+ * config/m32r/m32r.h (STORE_FLAG_VALUE): Likewise.
+ * config/mcore/mcore.h (STORE_FLAG_VALUE): Likewise.
+ * config/mips/mips.h (STORE_FLAG_VALUE): Likewise.
+ * config/mmix/mmix.h (STORE_FLAG_VALUE): Likewise.
+ * config/ns32k/ns32k.h (STORE_FLAG_VALUE): Likewise.
+ * config/pa/pa.h (STORE_FLAG_VALUE): Likewise.
+ * config/pdp11/pdp11.h (STORE_FLAG_VALUE): Likewise.
+ * config/sh/sh.h (STORE_FLAG_VALUE): Likewise.
+ * config/sparc/sparc.h (STORE_FLAG_VALUE): Likewise.
+ * config/v850/v850.h (STORE_FLAG_VALUE): Likewise.
+ * config/xtensa/xtensa.h (STORE_FLAG_VALUE): Likewise.
+
2003-06-14 Nathan Sidwell <nathan@codesourcery.com>
* opts.sh (POSIXLY_CORRECT): Unset it.
is done just by pretending it is already truncated. */
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
-/* We assume that the store-condition-codes instructions store 0 for false
- and some other value for true. This is the value stored for true. */
-
-#define STORE_FLAG_VALUE 1
-
/* The CIX ctlz and cttz instructions return 64 for zero. */
#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX)
#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX)
is done just by pretending it is already truncated. */
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
-/* We assume that the store-condition-codes instructions store 0 for false
- and some other value for true. This is the value stored for true. */
-#define STORE_FLAG_VALUE 1
-
/* Specify the machine mode that pointers have.
After generation of rtl, the compiler makes no further distinction
between pointers and any other objects of this machine mode. */
} \
while (0)
-#define STORE_FLAG_VALUE 1
-
/* The arm5 clz instruction returns 32. */
#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1)
\f
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
-#define STORE_FLAG_VALUE 1
-
#define Pmode SImode
#define FUNCTION_MODE QImode
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) (OUTPREC != 16)
-/* We assume that the store-condition-codes instructions store 0 for false
- and some other value for true. This is the value stored for true. */
-
-/* #define STORE_FLAG_VALUE (-1) */
+/* ??? Investigate defining STORE_FLAG_VALUE to (-1). */
/* When a prototype says `char' or `short', really pass an `int'. */
is done just by pretending it is already truncated. */
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
-/* We assume that the store-condition-codes instructions store 0 for false
- and some other value for true. This is the value stored for true. */
-
-#define STORE_FLAG_VALUE 1
-
/* When a prototype says `char' or `short', really pass an `int'.
(The 386 can't easily push less than an int.) */
#define SLOW_BYTE_ACCESS 1
-/* We assume that the store-condition-codes instructions store 0 for false
- and some other value for true. This is the value stored for true. */
-
-#define STORE_FLAG_VALUE 1
-
/* Define this to be nonzero if shift instructions ignore all but the low-order
few bits. */
#define SHIFT_COUNT_TRUNCATED 0
an integral mode and stored by a store-flag instruction (`sCOND') when the
condition is true. */
-/* ??? Investigate using -1 instead of 1. */
-
-#define STORE_FLAG_VALUE 1
+/* ??? Investigate using STORE_FLAG_VALUE of -1 instead of 1. */
/* An alias for the machine mode for pointers. */
/* Miscellaneous macros to describe machine specifics. */
-#define STORE_FLAG_VALUE 1
-
#define IS_PSEUDO_P(R) (REGNO (R) >= FIRST_PSEUDO_REGISTER)
/* Default calculations would cause DWARF address sizes to be 2 bytes,
is done just by pretending it is already truncated. */
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
-/* We assume that the store-condition-codes instructions store 0 for false
- and some other value for true. This is the value stored for true. */
-#define STORE_FLAG_VALUE 1
-
/* Specify the machine mode that pointers have.
After generation of rtl, the compiler makes no further distinction
between pointers and any other objects of this machine mode. */
/* Nonzero if access to memory by bytes is slow and undesirable. */
#define SLOW_BYTE_ACCESS TARGET_SLOW_BYTES
-/* We assume that the store-condition-codes instructions store 0 for false
- and some other value for true. This is the value stored for true. */
-#define STORE_FLAG_VALUE 1
-
/* Immediate shift counts are truncated by the output routines (or was it
the assembler?). Shift counts in a register are truncated by ARM. Note
that the native compiler puts too large (> 32) immediate shift counts
this as 1, since it avoids making a QI or HI mode register. */
#define SLOW_BYTE_ACCESS 1
-/* We assume that the store-condition-codes instructions store 0 for false
- and some other value for true. This is the value stored for true. */
-
-#define STORE_FLAG_VALUE 1
-
/* Define this to be nonzero if shift instructions ignore all but the low-order
few bits. */
#define SHIFT_COUNT_TRUNCATED 1
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
-/* We have a choice here too. */
-#if 0
-/* FIXME: Revisit, we don't have scc expanders yet. */
-#define STORE_FLAG_VALUE 1
-#endif
+/* ??? MMIX allows a choice of STORE_FLAG_VALUE. Revisit later,
+ we don't have scc expanders yet. */
#define Pmode DImode
is done just by pretending it is already truncated. */
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
-/* We assume that the store-condition-codes instructions store 0 for false
- and some other value for true. This is the value stored for true. */
-
-#define STORE_FLAG_VALUE 1
-
/* Specify the machine mode that pointers have.
After generation of rtl, the compiler makes no further distinction
between pointers and any other objects of this machine mode. */
is done just by pretending it is already truncated. */
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
-/* We assume that the store-condition-codes instructions store 0 for false
- and some other value for true. This is the value stored for true. */
-
-#define STORE_FLAG_VALUE 1
-
/* When a prototype says `char' or `short', really pass an `int'. */
#define PROMOTE_PROTOTYPES 1
#define PROMOTE_FUNCTION_RETURN 1
#define SELECT_CC_MODE(OP,X,Y) \
(GET_MODE_CLASS(GET_MODE(X)) == MODE_FLOAT? CCFPmode : CCmode)
-/* We assume that the store-condition-codes instructions store 0 for false
- and some other value for true. This is the value stored for true. */
-
-/* #define STORE_FLAG_VALUE 1 */
-
/* Specify the machine mode that pointers have.
After generation of rtl, the compiler makes no further distinction
between pointers and any other objects of this machine mode. */
/* Nonzero if access to memory by bytes is no faster than for words. */
#define SLOW_BYTE_ACCESS 1
-/* We assume that the store-condition-codes instructions store 0 for false
- and some other value for true. This is the value stored for true. */
-
-#define STORE_FLAG_VALUE 1
-
/* Immediate shift counts are truncated by the output routines (or was it
the assembler?). Shift counts in a register are truncated by SH. Note
that the native compiler puts too large (> 32) immediate shift counts
and maybe make use of that. */
#define SLOW_BYTE_ACCESS 1
-/* We assume that the store-condition-codes instructions store 0 for false
- and some other value for true. This is the value stored for true. */
-
-#define STORE_FLAG_VALUE 1
-
/* When a prototype says `char' or `short', really pass an `int'. */
#define PROMOTE_PROTOTYPES (TARGET_ARCH32)
is done just by pretending it is already truncated. */
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
-#define STORE_FLAG_VALUE 1
-
#define MULDI3_LIBCALL "__muldi3"
#define UCMPDI2_LIBCALL "__ucmpdi2"
#define CMPDI2_LIBCALL "__cmpdi2"
/* Prefer word-sized loads. */
#define SLOW_BYTE_ACCESS 1
-/* Xtensa doesn't have any instructions that set integer values based on the
- results of comparisons, but the simplification code in the combiner also
- uses this macro. The value should be either 1 or -1 to enable some
- optimizations in the combiner; I'm not sure which is better for us.
- Since we've been using 1 for a while, it should probably stay that way for
- compatibility. */
-#define STORE_FLAG_VALUE 1
+/* ??? Xtensa doesn't have any instructions that set integer values
+ based on the results of comparisons, but the simplification code in
+ the combiner also uses STORE_FLAG_VALUE. The default value (1) is
+ fine for us, but (-1) might be better. */
/* Shift instructions ignore all but the low-order few bits. */
#define SHIFT_COUNT_TRUNCATED 1
#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) 0
#endif
+/* Provide a default value for STORE_FLAG_VALUE. */
+#ifndef STORE_FLAG_VALUE
+#define STORE_FLAG_VALUE 1
+#endif
+
#endif /* ! GCC_DEFAULTS_H */
@file{rs6000.md} for some examples. The GNU Superoptizer can be used to
find such instruction sequences on other machines.
-You need not define @code{STORE_FLAG_VALUE} if the machine has no store-flag
-instructions.
+If this macro is not defined, the default value, 1, is used. You need
+not define @code{STORE_FLAG_VALUE} if the machine has no store-flag
+instructions, or if the value generated by these instructions is 1.
@findex FLOAT_STORE_FLAG_VALUE
@item FLOAT_STORE_FLAG_VALUE (@var{mode})
/* Called from integrate.c when a deferred constant is inlined. */
extern void notice_rtl_inlining_of_deferred_constant PARAMS ((void));
-/* Define a default value for STORE_FLAG_VALUE. */
-
-#ifndef STORE_FLAG_VALUE
-#define STORE_FLAG_VALUE 1
-#endif
-
/* Nonzero after the second flow pass has completed.
Set to 1 or 0 by toplev.c */
extern int flow2_completed;