END_CS;
}
+/* Translate pipe_format into US_OUT_FMT. Note that formats are stored from
+ * C3 to C0. */
+uint32_t translate_out_fmt(enum pipe_format format)
+{
+ switch (format) {
+ case PIPE_FORMAT_A8R8G8B8_UNORM:
+ return R300_US_OUT_FMT_C4_8 |
+ R300_C0_SEL_B | R300_C1_SEL_G |
+ R300_C2_SEL_R | R300_C3_SEL_A;
+ default:
+ return R300_US_OUT_FMT_UNUSED;
+ }
+ return 0;
+}
+
/* XXX add pitch, stride, z/stencil buf */
void r300_emit_fb_state(struct r300_context* r300,
struct pipe_framebuffer_state* fb)
tex = (struct r300_texture*)fb->cbufs[i]->texture;
OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1);
OUT_CS_RELOC(tex->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
+
+ OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i),
+ translate_out_fmt(fb->cbufs[i]->format));
}
R300_PACIFY;
END_CS;
# define R300_C3_SEL_G (2 << 14)
# define R300_C3_SEL_B (3 << 14)
# define R300_OUT_SIGN(x) (x << 16)
+# define R500_ROUND_ADJ (1 << 20)
/* ALU
* The ALU instructions register blocks are enumerated according to the order
# define R500_FORMAT_TXWIDTH(x) (x << 0)
# define R500_FORMAT_TXHEIGHT(x) (x << 11)
# define R500_FORMAT_TXDEPTH(x) (x << 22)
-/* _0 through _3 */
-#define R500_US_OUT_FMT_0 0x46A4
-# define R500_OUT_FMT_C4_8 (0 << 0)
-# define R500_OUT_FMT_C4_10 (1 << 0)
-# define R500_OUT_FMT_C4_10_GAMMA (2 << 0)
-# define R500_OUT_FMT_C_16 (3 << 0)
-# define R500_OUT_FMT_C2_16 (4 << 0)
-# define R500_OUT_FMT_C4_16 (5 << 0)
-# define R500_OUT_FMT_C_16_MPEG (6 << 0)
-# define R500_OUT_FMT_C2_16_MPEG (7 << 0)
-# define R500_OUT_FMT_C2_4 (8 << 0)
-# define R500_OUT_FMT_C_3_3_2 (9 << 0)
-# define R500_OUT_FMT_C_6_5_6 (10 << 0)
-# define R500_OUT_FMT_C_11_11_10 (11 << 0)
-# define R500_OUT_FMT_C_10_11_11 (12 << 0)
-# define R500_OUT_FMT_C_2_10_10_10 (13 << 0)
-/* #define R500_OUT_FMT_RESERVED (14 << 0) */
-# define R500_OUT_FMT_UNUSED (15 << 0)
-# define R500_OUT_FMT_C_16_FP (16 << 0)
-# define R500_OUT_FMT_C2_16_FP (17 << 0)
-# define R500_OUT_FMT_C4_16_FP (18 << 0)
-# define R500_OUT_FMT_C_32_FP (19 << 0)
-# define R500_OUT_FMT_C2_32_FP (20 << 0)
-# define R500_OUT_FMT_C4_32_FP (21 << 0)
-# define R500_C0_SEL_A (0 << 8)
-# define R500_C0_SEL_R (1 << 8)
-# define R500_C0_SEL_G (2 << 8)
-# define R500_C0_SEL_B (3 << 8)
-# define R500_C1_SEL_A (0 << 10)
-# define R500_C1_SEL_R (1 << 10)
-# define R500_C1_SEL_G (2 << 10)
-# define R500_C1_SEL_B (3 << 10)
-# define R500_C2_SEL_A (0 << 12)
-# define R500_C2_SEL_R (1 << 12)
-# define R500_C2_SEL_G (2 << 12)
-# define R500_C2_SEL_B (3 << 12)
-# define R500_C3_SEL_A (0 << 14)
-# define R500_C3_SEL_R (1 << 14)
-# define R500_C3_SEL_G (2 << 14)
-# define R500_C3_SEL_B (3 << 14)
-# define R500_OUT_SIGN(x) (x << 16)
-# define R500_ROUND_ADJ (1 << 20)
#define R500_US_PIXSIZE 0x4604
# define R500_PIX_SIZE(x) (x)
#define R500_US_TEX_ADDR_0 0x9800
#include "r300_context.h"
#include "r300_reg.h"
+#include "r300_state_shader.h"
/* r300_state: Functions used to intialize state context by translating
* Gallium state objects into semi-native r300 state objects.
return;
} else if (!fs->translated) {
if (r300_screen(r300->context.screen)->caps->is_r500) {
- r500_translate_shader(r300, fs);
+ r500_translate_fragment_shader(r300, (struct r500_fragment_shader*)fs);
} else {
- r300_translate_shader(r300, fs);
+ r300_translate_fragment_shader(r300, (struct r300_fragment_shader*)fs);
}
}
fs->instructions[0] = pt->instructions[0];
}
-void r300_translate_shader(struct r300_context* r300,
+void r300_translate_fragment_shader(struct r300_context* r300,
struct r300_fragment_shader* fs)
{
r300_copy_passthrough_shader(fs);
}
-void r500_translate_shader(struct r300_context* r300,
+void r500_translate_fragment_shader(struct r300_context* r300,
struct r500_fragment_shader* fs)
{
r500_copy_passthrough_shader(fs);
#include "r300_reg.h"
#include "r300_screen.h"
-void r300_translate_shader(struct r300_context* r300,
+void r300_translate_fragment_shader(struct r300_context* r300,
struct r300_fragment_shader* fs);
-void r500_translate_shader(struct r300_context* r300,
+void r500_translate_fragment_shader(struct r300_context* r300,
struct r500_fragment_shader* fs);
static const struct r300_fragment_shader r300_passthrough_fragment_shader = {
OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0);
OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0);
OUT_CS_REG(R300_US_CODE_ADDR_3, 0x400000);
- OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4);
- OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A);
- OUT_CS(R300_US_OUT_FMT_UNUSED);
- OUT_CS(R300_US_OUT_FMT_UNUSED);
- OUT_CS(R300_US_OUT_FMT_UNUSED);
- OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0); */
+*/
.alu_instruction_count = 1,
.tex_instruction_count = 0,
.indirections = 1,
r300_emit_fragment_shader(r300, &r300_passthrough_fragment_shader);
}
- BEGIN_CS(2 + (caps->has_tcl ? 23 : 2));
+ BEGIN_CS(10 + (caps->has_tcl ? 23 : 2));
+ OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4);
+ OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A);
+ OUT_CS(R300_US_OUT_FMT_UNUSED);
+ OUT_CS(R300_US_OUT_FMT_UNUSED);
+ OUT_CS(R300_US_OUT_FMT_UNUSED);
+ OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0);
/* XXX these magic numbers should be explained when
* this becomes a cached state object */
if (caps->has_tcl) {