re PR target/17565 ([3.3 only] asms in delay slots)

	PR target/17565
	* config/mips/mips.md (define_asm_attributes): Set can_delay to no.

From-SVN: r87744

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6f6582d3f1c90120fd876e5c002a6ad7b1c0550d..45f7fe7a9ed7a610215bdd5e78e92cd9f77f21ea 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2004-09-20  Richard Sandiford  <rsandifo@redhat.com>
+
+       PR target/17565
+       * config/mips/mips.md (define_asm_attributes): Set can_delay to no.
+
 2004-09-20  Jan Hubicka  <jh@suse.cz>
 
        * predict.c (estimate_probability): Remove unnecesary code.

diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index fb50b3bdab276b36b9e76aa625a6e14828ab58a6..b8239edf7b23650a7d9e1830a61ae7d3517b23fe 100644 (file)
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -310,7 +310,8 @@
 
 ;; Describe a user's asm statement.
 (define_asm_attributes
-  [(set_attr "type" "multi")])
+  [(set_attr "type" "multi")
+   (set_attr "can_delay" "no")])
 \f
 ;; This mode macro allows 32-bit and 64-bit GPR patterns to be generated
 ;; from the same template.

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 199ae8e18e79eaa9f5bacf18950c5c65121dae12..8548b4733e9ddd56802a3fe8792538e1a0561e7e 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2004-09-20  Richard Sandiford  <rsandifo@redhat.com>
+
+       * gcc.target/mips/asm-1.c: New test.
+
 2004-09-19  Ira Rosen  <irar@il.ibm.com>
 
        * gcc.dg/vect/vect-13.c: Now vectorized on ppc*.

diff --git a/gcc/testsuite/gcc.target/mips/asm-1.c b/gcc/testsuite/gcc.target/mips/asm-1.c
new file mode 100644 (file)
index 0000000..1a64e87
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/asm-1.c
@@ -0,0 +1,14 @@
+/* PR target/17565.  GCC used to put the asm into the delay slot
+   of the call.  */
+/* { dg-do assemble } */
+/* { dg-options "-O" } */
+int foo (int n)
+{
+  register int k asm ("$16") = n;
+  if (k > 0)
+    {
+      bar ();
+      asm ("li %0,0x12345678" : "=r" (k));
+    }
+  return k;
+}