--- /dev/null
+#ifndef BRW_BATCHBUFFER_H
+#define BRW_BATCHBUFFER_H
+
+#include "brw_types.h"
+#include "brw_winsys.h"
+#include "brw_reg.h"
+
+#define BATCH_SZ 16384
+#define BATCH_RESERVED 16
+
+/* All ignored:
+ */
+enum cliprect_mode {
+ IGNORE_CLIPRECTS,
+ LOOP_CLIPRECTS,
+ NO_LOOP_CLIPRECTS,
+ REFERENCES_CLIPRECTS
+};
+
+void brw_batchbuffer_free(struct brw_batchbuffer *batch);
+
+void _brw_batchbuffer_flush(struct brw_batchbuffer *batch,
+ const char *file, int line);
+
+#define brw_batchbuffer_flush(batch) \
+ _brw_batchbuffer_flush(batch, __FILE__, __LINE__)
+
+void brw_batchbuffer_reset(struct brw_batchbuffer *batch);
+
+
+/* Unlike bmBufferData, this currently requires the buffer be mapped.
+ * Consider it a convenience function wrapping multple
+ * intel_buffer_dword() calls.
+ */
+void brw_batchbuffer_data(struct brw_batchbuffer *batch,
+ const void *data, GLuint bytes,
+ enum cliprect_mode cliprect_mode);
+
+void brw_batchbuffer_release_space(struct brw_batchbuffer *batch,
+ GLuint bytes);
+
+GLboolean brw_batchbuffer_emit_reloc(struct brw_batchbuffer *batch,
+ struct brw_winsys_buffer *buffer,
+ uint32_t read_domains,
+ uint32_t write_domain,
+ uint32_t offset);
+
+/* Inline functions - might actually be better off with these
+ * non-inlined. Certainly better off switching all command packets to
+ * be passed as structs rather than dwords, but that's a little bit of
+ * work...
+ */
+static INLINE GLint
+brw_batchbuffer_space(struct brw_batchbuffer *batch)
+{
+ return (batch->size - BATCH_RESERVED) - (batch->ptr - batch->map);
+}
+
+
+static INLINE void
+brw_batchbuffer_emit_dword(struct brw_batchbuffer *batch, GLuint dword)
+{
+ assert(batch->map);
+ assert(brw_batchbuffer_space(batch) >= 4);
+ *(GLuint *) (batch->ptr) = dword;
+ batch->ptr += 4;
+}
+
+static INLINE boolean
+brw_batchbuffer_require_space(struct brw_batchbuffer *batch,
+ GLuint sz,
+ enum cliprect_mode cliprect_mode)
+{
+ assert(sz < batch->size - 8);
+ if (brw_batchbuffer_space(batch) < sz) {
+ assert(0);
+ return FALSE;
+ }
+
+ /* All commands should be executed once regardless of cliprect
+ * mode.
+ */
+ (void)cliprect_mode;
+}
+
+/* Here are the crusty old macros, to be removed:
+ */
+#define BATCH_LOCALS
+
+#define BEGIN_BATCH(n, cliprect_mode) do { \
+ brw_batchbuffer_require_space(intel->batch, (n)*4, cliprect_mode); \
+ assert(intel->batch->emit.start_ptr == NULL); \
+ intel->batch->emit.total = (n) * 4; \
+ intel->batch->emit.start_ptr = intel->batch->ptr; \
+} while (0)
+
+#define OUT_BATCH(d) brw_batchbuffer_emit_dword(intel->batch, d)
+
+#define OUT_RELOC(buf, read_domains, write_domain, delta) do { \
+ assert((unsigned) (delta) < buf->size); \
+ brw_batchbuffer_emit_reloc(intel->batch, buf, \
+ read_domains, write_domain, delta); \
+} while (0)
+
+#define ADVANCE_BATCH() do { \
+ unsigned int _n = intel->batch->ptr - intel->batch->emit.start_ptr; \
+ assert(intel->batch->emit.start_ptr != NULL); \
+ if (_n != intel->batch->emit.total) { \
+ fprintf(stderr, "ADVANCE_BATCH: %d of %d dwords emitted\n", \
+ _n, intel->batch->emit.total); \
+ abort(); \
+ } \
+ intel->batch->emit.start_ptr = NULL; \
+} while(0)
+
+
+static INLINE void
+brw_batchbuffer_emit_mi_flush(struct brw_batchbuffer *batch)
+{
+ brw_batchbuffer_require_space(batch, 4, IGNORE_CLIPRECTS);
+ brw_batchbuffer_emit_dword(batch, MI_FLUSH);
+}
+
+#endif
memset(&ccv, 0, sizeof(ccv));
/* PIPE_NEW_VIEWPORT */
- calc_sane_viewport( &brw->vp, &svp );
+ calc_sane_viewport( &brw->curr.vp, &svp );
ccv.min_depth = svp.near;
ccv.max_depth = svp.far;
cc_unit_populate_key(const struct brw_context *brw,
struct brw_cc_unit_key *key)
{
- key->cc0 = brw->dsa->cc0;
- key->cc1 = brw->dsa->cc1;
- key->cc2 = brw->dsa->cc2;
- key->cc3 = combine_cc3( brw->dsa->cc3, brw->blend->cc3 );
- key->cc5 = brw->blend->cc5;
- key->cc6 = brw->blend->cc6;
- key->cc7 = brw->blend->cc7;
+ key->cc0 = brw->curr.dsa->cc0;
+ key->cc1 = brw->curr.dsa->cc1;
+ key->cc2 = brw->curr.dsa->cc2;
+ key->cc3 = combine_cc3( brw->curr.dsa->cc3, brw->curr.blend->cc3 );
+ key->cc5 = brw->curr.blend->cc5;
+ key->cc6 = brw->curr.blend->cc6;
+ key->cc7 = brw->curr.blend->cc7;
}
/**
#include "util/u_math.h"
-#include "intel_batchbuffer.h"
-
+#include "brw_screen.h"
+#include "brw_batchbuffer.h"
#include "brw_defines.h"
#include "brw_context.h"
#include "brw_eu.h"
#include "brw_util.h"
#include "brw_state.h"
+#include "brw_pipe_rast.h"
#include "brw_clip.h"
else
delta = REG_SIZE;
- for (i = 0; i < VERT_RESULT_MAX; i++)
- if (c.key.attrs & (1<<i)) {
- c.offset[i] = delta;
- delta += ATTR_SIZE;
- }
+ /* XXX: c.offset is now pretty redundant:
+ */
+ for (i = 0; i < c.key.nr_attrs; i++) {
+ c.offset[i] = delta;
+ delta += ATTR_SIZE;
+ }
- c.nr_attrs = util_count_bits(c.key.attrs);
+ /* XXX: c.nr_attrs is very redundant:
+ */
+ c.nr_attrs = c.key.nr_attrs;
if (BRW_IS_IGDNG(brw))
c.nr_regs = (c.nr_attrs + 1) / 2 + 3; /* are vertices packed, or reg-aligned? */
{
struct brw_clip_prog_key key;
- memset(&key, 0, sizeof(key));
-
- /* Populate the key:
+ /* Populate the key, starting from the almost-complete version from
+ * the rast state.
*/
+
+ /* PIPE_NEW_RAST */
+ memcpy(&key, &brw->curr.rast->clip_key, sizeof key);
+
/* BRW_NEW_REDUCED_PRIMITIVE */
key.primitive = brw->reduced_primitive;
- /* CACHE_NEW_VS_PROG */
- key.attrs = brw->vs.prog_data->outputs_written;
- /* PIPE_NEW_RAST */
- key.do_flat_shading = brw->rast.base.flatshade;
- /* PIPE_NEW_UCP */
- key.nr_userclip = brw->nr_ucp;
- if (BRW_IS_IGDNG(brw))
- key.clip_mode = BRW_CLIPMODE_KERNEL_CLIP;
- else
- key.clip_mode = BRW_CLIPMODE_NORMAL;
+ /* PIPE_NEW_VS */
+ key.nr_attrs = brw->curr.vs->info.file_max[TGSI_FILE_OUTPUT] + 1;
- /* PIPE_NEW_RAST */
- if (key.primitive == PIPE_PRIM_TRIANGLES) {
- if (brw->rast->cull_mode = PIPE_WINDING_BOTH)
- key.clip_mode = BRW_CLIPMODE_REJECT_ALL;
- else {
- key.fill_ccw = CLIP_CULL;
- key.fill_cw = CLIP_CULL;
-
- if (!(brw->rast->cull_mode & PIPE_WINDING_CCW)) {
- key.fill_ccw = translate_fill(brw->rast.fill_ccw);
- }
-
- if (!(brw->rast->cull_mode & PIPE_WINDING_CW)) {
- key.fill_cw = translate_fill(brw->rast.fill_cw);
- }
-
- if (key.fill_cw != CLIP_FILL ||
- key.fill_ccw != CLIP_FILL) {
- key.do_unfilled = 1;
- key.clip_mode = BRW_CLIPMODE_CLIP_NON_REJECTED;
- }
-
- key.offset_ccw = brw->rast.offset_ccw;
- key.offset_cw = brw->rast.offset_cw;
-
- if (brw->rast.light_twoside &&
- key.fill_cw != CLIP_CULL)
- key.copy_bfc_cw = 1;
-
- if (brw->rast.light_twoside &&
- key.fill_ccw != CLIP_CULL)
- key.copy_bfc_ccw = 1;
- }
- }
- }
+ /* PIPE_NEW_CLIP */
+ key.nr_userclip = brw->curr.ucp.nr;
brw->sws->bo_unreference(brw->clip.prog_bo);
brw->clip.prog_bo = brw_search_cache(&brw->cache, BRW_CLIP_PROG,
const struct brw_tracked_state brw_clip_prog = {
.dirty = {
.mesa = (PIPE_NEW_RAST |
- PIPE_NEW_UCP),
+ PIPE_NEW_CLIP),
.brw = (BRW_NEW_REDUCED_PRIMITIVE),
.cache = CACHE_NEW_VS_PROG
},
* up polygon offset and flatshading at this point:
*/
struct brw_clip_prog_key {
- GLuint attrs:32;
-
+ GLuint nr_attrs:5;
GLuint primitive:4;
GLuint nr_userclip:3;
GLuint do_flat_shading:1;
GLuint copy_bfc_cw:1;
GLuint copy_bfc_ccw:1;
GLuint clip_mode:3;
- GLuint pad1:12;
+ GLuint pad1:7;
GLfloat offset_factor;
GLfloat offset_units;
GLuint last_mrf;
GLuint header_position_offset;
- GLuint offset[VERT_ATTRIB_MAX];
+ GLuint offset[PIPE_MAX_SHADER_OUTPUTS];
GLboolean need_ff_sync;
};
* Keith Whitwell <keith@tungstengraphics.com>
*/
-#include "intel_batchbuffer.h"
+#include "brw_batchbuffer.h"
#include "brw_defines.h"
#include "brw_context.h"
/* value.xyz *= value.rhw
*/
brw_set_access_mode(p, BRW_ALIGN_16);
- brw_MUL(p, brw_writemask(pos, WRITEMASK_XYZ), pos, brw_swizzle1(pos, W));
+ brw_MUL(p, brw_writemask(pos, BRW_WRITEMASK_XYZ), pos, brw_swizzle1(pos, W));
brw_set_access_mode(p, BRW_ALIGN_1);
}
#include "brw_state.h"
#include "brw_vs.h"
#include "brw_screen_tex.h"
-#include "intel_batchbuffer.h"
+#include "brw_batchbuffer.h"
#include "brw_structs.h"
#include "brw_winsys.h"
#include "pipe/p_state.h"
+#include "pipe/p_context.h"
+#include "tgsi/tgsi_scan.h"
/* Glossary:
};
+struct brw_rasterizer_state;
+
+
+struct brw_vertex_shader {
+ const struct tgsi_token *tokens;
+ struct tgsi_shader_info info;
+
+ struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */
+ GLboolean use_const_buffer;
+};
+
+
+struct brw_fragment_shader {
+ const struct tgsi_token *tokens;
+ struct tgsi_shader_info info;
+
+ GLboolean isGLSL;
+
+ struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */
+ GLboolean use_const_buffer;
+};
#define PIPE_NEW_VERTEX_SHADER 0x2
#define PIPE_NEW_FRAGMENT_CONSTS 0x2
#define PIPE_NEW_VERTEX_CONSTS 0x2
+#define PIPE_NEW_CLIP 0x2
#define BRW_NEW_URB_FENCE 0x1
};
-struct brw_vertex_program {
- const struct tgsi_token *tokens;
- GLuint id;
- struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */
- GLboolean use_const_buffer;
-};
-
-
-/** Subclass of Mesa fragment program */
-struct brw_fragment_program {
- const struct tgsi_token *tokens;
-
- GLuint id; /**< serial no. to identify frag progs, never re-used */
- GLboolean isGLSL; /**< any IF/LOOP/CONT/BREAK instructions */
-
- struct brw_winsys_buffer *const_buffer; /** Program constant buffer/surface */
- GLboolean use_const_buffer;
-};
-
/* Data about a particular attempt to compile a program. Note that
* there can be many of these, each in a different GL state
*/
struct brw_context
{
- struct pipe_context *pipe;
- struct pipe_screen *screen;
-
+ struct pipe_context pipe;
+
+ struct brw_screen *brw_screen;
struct brw_winsys_screen *sws;
GLuint primitive;
+ GLuint reduced_primitive;
GLboolean emit_state_always;
GLboolean no_batch_wrap;
/* Active vertex program:
*/
- const struct gl_vertex_program *vertex_program;
- const struct gl_fragment_program *fragment_program;
- struct pipe_framebuffer_state fb;
- struct brw_depth_stencil_alpha_state *dsa;
- struct brw_blend_state *blend;
- struct pipe_viewport_state vp;
+ struct {
+ const struct brw_vertex_shader *vs;
+ const struct brw_fragment_shader *fs;
+ const struct brw_blend_state *blend;
+ const struct brw_rasterizer_state *rast;
+ const struct brw_depth_stencil_alpha_state *dsa;
+ struct pipe_framebuffer_state fb;
+ struct pipe_viewport_state vp;
+ struct pipe_clip_state ucp;
+ } curr;
struct {
struct brw_state_flags dirty;
return (struct brw_context *)ctx;
}
-static INLINE struct brw_vertex_program *
-brw_vertex_program(struct gl_vertex_program *p)
-{
- return (struct brw_vertex_program *) p;
-}
-
-static INLINE const struct brw_vertex_program *
-brw_vertex_program_const(const struct gl_vertex_program *p)
-{
- return (const struct brw_vertex_program *) p;
-}
-
-static INLINE struct brw_fragment_program *
-brw_fragment_program(struct gl_fragment_program *p)
-{
- return (struct brw_fragment_program *) p;
-}
-
-static INLINE const struct brw_fragment_program *
-brw_fragment_program_const(const struct gl_fragment_program *p)
-{
- return (const struct brw_fragment_program *) p;
-}
*/
-#include "intel_batchbuffer.h"
+#include "brw_batchbuffer.h"
#include "intel_regions.h"
#include "brw_context.h"
#include "brw_defines.h"
GLuint nr_clip_regs = 0;
GLuint total_regs;
- /* PIPE_NEW_UCP */
- if (brw->nr_ucp) {
+ /* PIPE_NEW_CLIP */
+ if (brw->curr.ucp.nr) {
GLuint nr_planes = 6 + brw->nr_ucp;
nr_clip_regs = (nr_planes * 4 + 15) / 16;
}
const struct brw_tracked_state brw_curbe_offsets = {
.dirty = {
- .mesa = PIPE_NEW_UCP,
+ .mesa = PIPE_NEW_CLIP,
.brw = BRW_NEW_VERTEX_PROGRAM,
.cache = CACHE_NEW_WM_PROG
},
.dirty = {
.mesa = (PIPE_NEW_FS_CONSTANTS |
PIPE_NEW_VS_CONSTANTS |
- PIPE_NEW_UCP),
+ PIPE_NEW_CLIP),
.brw = (BRW_NEW_FRAGMENT_PROGRAM |
BRW_NEW_VERTEX_PROGRAM |
BRW_NEW_URB_FENCE | /* Implicit - hardware requires this, not used above */
#include "intel_chipset.h"
-#define BRW_IS_G4X(brw) (IS_G4X((brw)->brw_screen->deviceID))
-#define BRW_IS_IGDNG(brw) (IS_IGDNG((brw)->brw_screen->deviceID))
+#define BRW_IS_G4X(brw) (IS_G4X((brw)->brw_screen->pci_id))
+#define BRW_IS_IGDNG(brw) (IS_IGDNG((brw)->brw_screen->pci_id))
#define BRW_IS_965(brw) (!(BRW_IS_G4X(brw) || BRW_IS_IGDNG(brw)))
#define CMD_PIPELINE_SELECT(brw) ((BRW_IS_G4X(brw) || BRW_IS_IGDNG(brw)) ? CMD_PIPELINE_SELECT_GM45 : CMD_PIPELINE_SELECT_965)
#define CMD_VF_STATISTICS(brw) ((BRW_IS_G4X(brw) || BRW_IS_IGDNG(brw)) ? CMD_VF_STATISTICS_GM45 : CMD_VF_STATISTICS_965)
#include "brw_context.h"
#include "brw_state.h"
-#include "intel_batchbuffer.h"
+#include "brw_batchbuffer.h"
#include "intel_buffer_objects.h"
#define FILE_DEBUG_FLAG DEBUG_BATCH
ADVANCE_BATCH();
}
if (prim_packet.verts_per_instance) {
- intel_batchbuffer_data( brw->intel.batch, &prim_packet,
+ brw_batchbuffer_data( brw->intel.batch, &prim_packet,
sizeof(prim_packet), LOOP_CLIPRECTS);
}
if (intel->always_flush_cache) {
return ret;
if (intel->always_flush_batch)
- intel_batchbuffer_flush(intel->batch);
+ brw_batchbuffer_flush(intel->batch);
return 0;
}
*/
ret = brw_try_draw_prims(ctx, arrays, prim, nr_prims, ib, min_index, max_index);
- /* Otherwise, we really are out of memory. Pass the drawing
- * command to the software tnl module and which will in turn call
- * swrast to do the drawing.
+ /* Otherwise, flush and retry:
*/
if (ret != 0) {
- intel_batchbuffer_flush(intel->batch);
+ brw_batchbuffer_flush(intel->batch);
ret = brw_try_draw_prims(ctx, arrays, prim, nr_prims, ib, min_index, max_index);
assert(ret == 0);
}
#include "brw_state.h"
#include "brw_fallback.h"
-#include "intel_batchbuffer.h"
+#include "brw_batchbuffer.h"
#include "intel_buffer_objects.h"
#include "intel_tex.h"
#include "brw_structs.h"
#include "brw_defines.h"
-#include "shader/prog_instruction.h"
#define BRW_SWIZZLE4(a,b,c,d) (((a)<<0) | ((b)<<2) | ((c)<<4) | ((d)<<6))
#define BRW_GET_SWZ(swz, idx) (((swz) >> ((idx)*2)) & 0x3)
#define BRW_SWIZZLE_XXXX BRW_SWIZZLE4(0,0,0,0)
#define BRW_SWIZZLE_XYXY BRW_SWIZZLE4(0,1,0,1)
+#define BRW_WRITEMASK_NONE 0x00
+#define BRW_WRITEMASK_X 0x01
+#define BRW_WRITEMASK_Y 0x02
+#define BRW_WRITEMASK_XY 0x03
+#define BRW_WRITEMASK_Z 0x04
+#define BRW_WRITEMASK_XZ 0x05
+#define BRW_WRITEMASK_YZ 0x06
+#define BRW_WRITEMASK_XYZ 0x07
+#define BRW_WRITEMASK_W 0x08
+#define BRW_WRITEMASK_XW 0x09
+#define BRW_WRITEMASK_YW 0x0A
+#define BRW_WRITEMASK_XYW 0x0B
+#define BRW_WRITEMASK_ZW 0x0C
+#define BRW_WRITEMASK_XZW 0x0D
+#define BRW_WRITEMASK_YZW 0x0E
+#define BRW_WRITEMASK_XYZW 0x0F
+
#define REG_SIZE (8*4)
* \param width one of BRW_WIDTH_x
* \param hstride one of BRW_HORIZONTAL_STRIDE_x
* \param swizzle one of BRW_SWIZZLE_x
- * \param writemask WRITEMASK_X/Y/Z/W bitfield
+ * \param writemask BRW_WRITEMASK_X/Y/Z/W bitfield
*/
static INLINE struct brw_reg brw_reg( GLuint file,
GLuint nr,
BRW_WIDTH_16,
BRW_HORIZONTAL_STRIDE_1,
BRW_SWIZZLE_XYZW,
- WRITEMASK_XYZW);
+ BRW_WRITEMASK_XYZW);
}
/** Construct float[8] register */
BRW_WIDTH_8,
BRW_HORIZONTAL_STRIDE_1,
BRW_SWIZZLE_XYZW,
- WRITEMASK_XYZW);
+ BRW_WRITEMASK_XYZW);
}
/** Construct float[4] register */
BRW_WIDTH_4,
BRW_HORIZONTAL_STRIDE_1,
BRW_SWIZZLE_XYZW,
- WRITEMASK_XYZW);
+ BRW_WRITEMASK_XYZW);
}
/** Construct float[2] register */
BRW_WIDTH_2,
BRW_HORIZONTAL_STRIDE_1,
BRW_SWIZZLE_XYXY,
- WRITEMASK_XY);
+ BRW_WRITEMASK_XY);
}
/** Construct float[1] register */
BRW_WIDTH_1,
BRW_HORIZONTAL_STRIDE_0,
BRW_SWIZZLE_XXXX,
- WRITEMASK_X);
+ BRW_WRITEMASK_X);
}
BRW_WIDTH_1,
BRW_HORIZONTAL_STRIDE_0,
BRW_SWIZZLE_XYZW, /* NOTE! */
- WRITEMASK_XYZW); /* NOTE! */
+ BRW_WRITEMASK_XYZW); /* NOTE! */
}
static INLINE struct brw_reg brw_acc_reg( void )
* instruction, so that is a guide for whether a workaround is
* needed.
*/
- if (writemask != WRITEMASK_XYZW) {
+ if (writemask != BRW_WRITEMASK_XYZW) {
GLuint dst_offset = 0;
GLuint i, newmask = 0, len = 0;
else {
struct brw_reg m1 = brw_message_reg(msg_reg_nr);
- newmask = ~newmask & WRITEMASK_XYZW;
+ newmask = ~newmask & BRW_WRITEMASK_XYZW;
brw_push_insn_state(p);
* Keith Whitwell <keith@tungstengraphics.com>
*/
-#include "intel_batchbuffer.h"
+#include "brw_batchbuffer.h"
#include "brw_defines.h"
#include "brw_context.h"
*/
-#include "intel_batchbuffer.h"
+#include "brw_batchbuffer.h"
#include "brw_defines.h"
#include "brw_context.h"
-#include "intel_batchbuffer.h"
+#include "brw_batchbuffer.h"
#include "intel_regions.h"
#include "brw_context.h"
/**
- * called from intel_batchbuffer_flush and children before sending a
+ * called from brw_batchbuffer_flush and children before sending a
* batchbuffer off.
*/
static void brw_finish_batch(struct intel_context *intel)
#include "brw_context.h"
#include "brw_state.h"
-#include "intel_batchbuffer.h"
+#include "brw_batchbuffer.h"
#include "intel_reg.h"
/** Waits on the query object's BO and totals the results for this query */
*/
if (query->bo) {
brw_emit_query_end(brw);
- intel_batchbuffer_flush(brw->batch);
+ brw_batchbuffer_flush(brw->batch);
brw->sws->bo_unreference(brw->query.bo);
brw->query.bo = NULL;
--- /dev/null
+
+static void
+calculate_clip_key_rast()
+{
+ if (BRW_IS_IGDNG(brw))
+ key.clip_mode = BRW_CLIPMODE_KERNEL_CLIP;
+ else
+ key.clip_mode = BRW_CLIPMODE_NORMAL;
+
+ key.do_flat_shading = brw->rast->templ.flatshade;
+
+ if (key.primitive == PIPE_PRIM_TRIANGLES) {
+ if (brw->rast->templ.cull_mode = PIPE_WINDING_BOTH)
+ key.clip_mode = BRW_CLIPMODE_REJECT_ALL;
+ else {
+ key.fill_ccw = CLIP_CULL;
+ key.fill_cw = CLIP_CULL;
+
+ if (!(brw->rast->templ.cull_mode & PIPE_WINDING_CCW)) {
+ key.fill_ccw = translate_fill(brw->rast.fill_ccw);
+ }
+
+ if (!(brw->rast->templ.cull_mode & PIPE_WINDING_CW)) {
+ key.fill_cw = translate_fill(brw->rast.fill_cw);
+ }
+
+ if (key.fill_cw != CLIP_FILL ||
+ key.fill_ccw != CLIP_FILL) {
+ key.do_unfilled = 1;
+ key.clip_mode = BRW_CLIPMODE_CLIP_NON_REJECTED;
+ }
+
+ key.offset_ccw = brw->rast.templ.offset_ccw;
+ key.offset_cw = brw->rast.templ.offset_cw;
+
+ if (brw->rast.templ.light_twoside &&
+ key.fill_cw != CLIP_CULL)
+ key.copy_bfc_cw = 1;
+
+ if (brw->rast.templ.light_twoside &&
+ key.fill_ccw != CLIP_CULL)
+ key.copy_bfc_ccw = 1;
+ }
+ }
+ }
+}
--- /dev/null
+#ifndef BRW_PIPE_RAST_H
+#define BRW_PIPE_RAST_H
+
+#include "brw_clip.h"
+
+struct brw_rasterizer_state {
+ struct pipe_rasterizer_state templ; /* for draw module */
+
+ /* Precalculated hardware state:
+ */
+ struct brw_clip_prog_key clip_key;
+};
+
+#endif
--- /dev/null
+/*
+ Copyright (C) Intel Corp. 2006. All Rights Reserved.
+ Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
+ develop this 3D driver.
+
+ Permission is hereby granted, free of charge, to any person obtaining
+ a copy of this software and associated documentation files (the
+ "Software"), to deal in the Software without restriction, including
+ without limitation the rights to use, copy, modify, merge, publish,
+ distribute, sublicense, and/or sell copies of the Software, and to
+ permit persons to whom the Software is furnished to do so, subject to
+ the following conditions:
+
+ The above copyright notice and this permission notice (including the
+ next paragraph) shall be included in all copies or substantial
+ portions of the Software.
+
+ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+ **********************************************************************/
+ /*
+ * Authors:
+ * Keith Whitwell <keith@tungstengraphics.com>
+ */
+
+#include "brw_context.h"
+#include "brw_util.h"
+#include "brw_wm.h"
+
+static void brwBindProgram( struct brw_context *brw,
+ GLenum target,
+ struct gl_program *prog )
+{
+ struct brw_context *brw = brw_context(ctx);
+
+ switch (target) {
+ case GL_VERTEX_PROGRAM_ARB:
+ brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM;
+ break;
+ case GL_FRAGMENT_PROGRAM_ARB:
+ brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM;
+ break;
+ }
+}
+
+static struct gl_program *brwNewProgram( structg brw_context *brw,
+ GLenum target,
+ GLuint id )
+{
+ struct brw_context *brw = brw_context(ctx);
+
+ switch (target) {
+ case GL_VERTEX_PROGRAM_ARB: {
+ struct brw_vertex_program *prog = CALLOC_STRUCT(brw_vertex_program);
+ if (prog) {
+ prog->id = brw->program_id++;
+
+ return _mesa_init_vertex_program( ctx, &prog->program,
+ target, id );
+ }
+ else
+ return NULL;
+ }
+
+ case GL_FRAGMENT_PROGRAM_ARB: {
+ struct brw_fragment_program *prog = CALLOC_STRUCT(brw_fragment_program);
+ if (prog) {
+ prog->id = brw->program_id++;
+
+ return _mesa_init_fragment_program( ctx, &prog->program,
+ target, id );
+ }
+ else
+ return NULL;
+ }
+
+ default:
+ return _mesa_new_program(ctx, target, id);
+ }
+}
+
+static void brwDeleteProgram( struct brw_context *brw,
+ struct gl_program *prog )
+{
+ if (prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
+ struct gl_fragment_program *fprog = (struct gl_fragment_program *) prog;
+ struct brw_fragment_program *brw_fprog = brw_fragment_program(fprog);
+ brw->sws->bo_unreference(brw_fprog->const_buffer);
+ }
+
+ _mesa_delete_program( ctx, prog );
+}
+
+
+static GLboolean brwIsProgramNative( struct brw_context *brw,
+ GLenum target,
+ struct gl_program *prog )
+{
+ return GL_TRUE;
+}
+
+static void brwProgramStringNotify( struct brw_context *brw,
+ GLenum target,
+ struct gl_program *prog )
+{
+ struct brw_context *brw = brw_context(ctx);
+
+ if (target == GL_FRAGMENT_PROGRAM_ARB) {
+ struct gl_fragment_program *fprog = (struct gl_fragment_program *) prog;
+ struct brw_fragment_program *newFP = brw_fragment_program(fprog);
+ const struct brw_fragment_program *curFP =
+ brw_fragment_program_const(brw->fragment_program);
+
+ if (fprog->FogOption) {
+ _mesa_append_fog_code(ctx, fprog);
+ fprog->FogOption = GL_NONE;
+ }
+
+ if (newFP == curFP)
+ brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM;
+ newFP->id = brw->program_id++;
+ newFP->isGLSL = brw_wm_is_glsl(fprog);
+ }
+ else if (target == GL_VERTEX_PROGRAM_ARB) {
+ struct gl_vertex_program *vprog = (struct gl_vertex_program *) prog;
+ struct brw_vertex_program *newVP = brw_vertex_program(vprog);
+ const struct brw_vertex_program *curVP =
+ brw_vertex_program_const(brw->vertex_program);
+
+ if (newVP == curVP)
+ brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM;
+ if (newVP->program.IsPositionInvariant) {
+ _mesa_insert_mvp_code(ctx, &newVP->program);
+ }
+ newVP->id = brw->program_id++;
+
+ /* Also tell tnl about it:
+ */
+ _tnl_program_string(ctx, target, prog);
+ }
+}
+
+void brwInitFragProgFuncs( struct dd_function_table *functions )
+{
+ assert(functions->ProgramStringNotify == _tnl_program_string);
+
+ functions->BindProgram = brwBindProgram;
+ functions->NewProgram = brwNewProgram;
+ functions->DeleteProgram = brwDeleteProgram;
+ functions->IsProgramNative = brwIsProgramNative;
+ functions->ProgramStringNotify = brwProgramStringNotify;
+}
+
--- /dev/null
+/**************************************************************************
+ *
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#ifndef BRW_REG_H
+#define BRW_REG_H
+
+#define CMD_MI (0x0 << 29)
+#define CMD_2D (0x2 << 29)
+#define CMD_3D (0x3 << 29)
+
+#define MI_NOOP (CMD_MI | 0)
+#define MI_BATCH_BUFFER_END (CMD_MI | 0xA << 23)
+#define MI_FLUSH (CMD_MI | (4 << 23))
+
+#define _3DSTATE_DRAWRECT_INFO_I965 (CMD_3D | (3 << 27) | (1 << 24) | 0x2)
+
+/** @{
+ *
+ * PIPE_CONTROL operation, a combination MI_FLUSH and register write with
+ * additional flushing control.
+ */
+#define _3DSTATE_PIPE_CONTROL (CMD_3D | (3 << 27) | (2 << 24) | 2)
+#define PIPE_CONTROL_NO_WRITE (0 << 14)
+#define PIPE_CONTROL_WRITE_IMMEDIATE (1 << 14)
+#define PIPE_CONTROL_WRITE_DEPTH_COUNT (2 << 14)
+#define PIPE_CONTROL_WRITE_TIMESTAMP (3 << 14)
+#define PIPE_CONTROL_DEPTH_STALL (1 << 13)
+#define PIPE_CONTROL_WRITE_FLUSH (1 << 12)
+#define PIPE_CONTROL_INSTRUCTION_FLUSH (1 << 11)
+#define PIPE_CONTROL_INTERRUPT_ENABLE (1 << 8)
+#define PIPE_CONTROL_PPGTT_WRITE (0 << 2)
+#define PIPE_CONTROL_GLOBAL_GTT_WRITE (1 << 2)
+
+/** @} */
+
+#define XY_SETUP_BLT_CMD (CMD_2D | (0x01 << 22) | 6)
+#define XY_COLOR_BLT_CMD (CMD_2D | (0x50 << 22) | 4)
+#define XY_SRC_COPY_BLT_CMD (CMD_2D | (0x53 << 22) | 6)
+
+/* BR00 */
+#define XY_BLT_WRITE_ALPHA (1 << 21)
+#define XY_BLT_WRITE_RGB (1 << 20)
+#define XY_SRC_TILED (1 << 15)
+#define XY_DST_TILED (1 << 11)
+
+/* BR13 */
+#define BR13_565 (0x1 << 24)
+#define BR13_8888 (0x3 << 24)
+
+#define FENCE_LINEAR 0
+#define FENCE_XMAJOR 1
+#define FENCE_YMAJOR 2
+
+
+#endif
--- /dev/null
+/**************************************************************************
+ *
+ * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#ifndef BRW_SCREEN_H
+#define BRW_SCREEN_H
+
+#include "pipe/p_state.h"
+#include "pipe/p_screen.h"
+
+
+struct brw_winsys_screen;
+
+
+/**
+ * Subclass of pipe_screen
+ */
+struct brw_screen
+{
+ struct pipe_screen base;
+
+ struct brw_winsys_screen *sws;
+
+ boolean is_i945;
+ uint pci_id;
+};
+
+/**
+ * Subclass of pipe_transfer
+ */
+struct brw_transfer
+{
+ struct pipe_transfer base;
+
+ unsigned offset;
+};
+
+
+/*
+ * Cast wrappers
+ */
+static INLINE struct brw_screen *
+brw_screen(struct pipe_screen *pscreen)
+{
+ return (struct brw_screen *) pscreen;
+}
+
+static INLINE struct brw_transfer *
+brw_transfer(struct pipe_transfer *transfer)
+{
+ return (struct brw_transfer *)transfer;
+}
+
+
+#endif /* BRW_SCREEN_H */
/* _NEW_BUFFERS */
- if (IS_965(intel->intelScreen->deviceID) &&
- !IS_G4X(intel->intelScreen->deviceID)) {
+ if (IS_965(brw->brw_screen->pci_id) &&
+ !IS_G4X(brw->brw_screen->pci_id)) {
for (i = 0; i < ctx->DrawBuffer->_NumColorDrawBuffers; i++) {
struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[i];
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
*/
-#include "intel_batchbuffer.h"
+#include "brw_batchbuffer.h"
#include "brw_defines.h"
#include "brw_context.h"
#define BRW_SF_H
-#include "shader/program.h"
#include "brw_context.h"
#include "brw_eu.h"
*/
-#include "intel_batchbuffer.h"
+#include "brw_batchbuffer.h"
#include "brw_defines.h"
#include "brw_context.h"
/***********************************************************************
* brw_state_batch.c
*/
-#define BRW_BATCH_STRUCT(brw, s) intel_batchbuffer_data( brw->intel.batch, (s), sizeof(*(s)), IGNORE_CLIPRECTS)
+#define BRW_BATCH_STRUCT(brw, s) brw_batchbuffer_data( brw->intel.batch, (s), sizeof(*(s)), IGNORE_CLIPRECTS)
#define BRW_CACHED_BATCH_STRUCT(brw, s) brw_cached_batch_struct( brw, (s), sizeof(*(s)) )
GLboolean brw_cached_batch_struct( struct brw_context *brw,
#include "brw_state.h"
-#include "intel_batchbuffer.h"
+#include "brw_batchbuffer.h"
struct header *newheader = (struct header *)data;
if (brw->emit_state_always) {
- intel_batchbuffer_data(brw->intel.batch, data, sz, IGNORE_CLIPRECTS);
+ brw_batchbuffer_data(brw->intel.batch, data, sz, IGNORE_CLIPRECTS);
return GL_TRUE;
}
emit:
memcpy(item->header, newheader, sz);
- intel_batchbuffer_data(brw->intel.batch, data, sz, IGNORE_CLIPRECTS);
+ brw_batchbuffer_data(brw->intel.batch, data, sz, IGNORE_CLIPRECTS);
return GL_TRUE;
}
*/
#include "brw_state.h"
-#include "intel_batchbuffer.h"
+#include "brw_batchbuffer.h"
/* XXX: Fixme - have to include these to get the sizes of the prog_key
* structs:
#include "brw_context.h"
#include "brw_state.h"
-#include "intel_batchbuffer.h"
+#include "brw_batchbuffer.h"
/* This is used to initialize brw->state.atoms[]. We could use this
* list directly except for a single atom, brw_constant_buffer, which
switch (mt->target) {
case GL_TEXTURE_CUBE_MAP:
- if (IS_IGDNG(intel->intelScreen->deviceID)) {
+ if (IS_IGDNG(brw->brw_screen->pci_id)) {
GLuint align_h = 2, align_w = 4;
GLuint level;
GLuint x = 0;
-#include "intel_batchbuffer.h"
+#include "brw_batchbuffer.h"
#include "brw_context.h"
#include "brw_state.h"
#include "brw_defines.h"
#include "brw_types.h"
extern GLuint brw_count_bits( GLuint val );
-extern GLuint brw_parameter_list_state_flags(struct gl_program_parameter_list *paramList);
-extern GLuint brw_translate_blend_factor( GLenum factor );
-extern GLuint brw_translate_blend_equation( GLenum mode );
+extern GLuint brw_translate_blend_factor( unsigned factor );
+extern GLuint brw_translate_blend_equation( unsigned mode );
#include "brw_vs.h"
#include "brw_util.h"
#include "brw_state.h"
-#include "shader/prog_print.h"
*/
const struct brw_tracked_state brw_vs_prog = {
.dirty = {
- .mesa = PIPE_NEW_UCP | PIPE_NEW_RAST,
+ .mesa = PIPE_NEW_CLIP | PIPE_NEW_RAST,
.brw = BRW_NEW_VERTEX_PROGRAM,
.cache = 0
},
#include "brw_context.h"
#include "brw_eu.h"
-#include "shader/program.h"
struct brw_vs_prog_key {
BRW_WIDTH_8,
BRW_HORIZONTAL_STRIDE_1,
BRW_SWIZZLE_XXXX,
- WRITEMASK_X);
+ BRW_WRITEMASK_X);
reg++;
}
struct brw_compile *p = &c->func;
- if (dst.dw1.bits.writemask & WRITEMASK_X) {
+ if (dst.dw1.bits.writemask & BRW_WRITEMASK_X) {
struct brw_reg tmp = get_tmp(c);
struct brw_reg tmp_d = retype(tmp, BRW_REGISTER_TYPE_D);
/* Adjust exponent for floating point:
* exp += 127
*/
- brw_ADD(p, brw_writemask(tmp_d, WRITEMASK_X), tmp_d, brw_imm_d(127));
+ brw_ADD(p, brw_writemask(tmp_d, BRW_WRITEMASK_X), tmp_d, brw_imm_d(127));
/* Install exponent and sign.
* Excess drops off the edge:
*/
- brw_SHL(p, brw_writemask(retype(dst, BRW_REGISTER_TYPE_D), WRITEMASK_X),
+ brw_SHL(p, brw_writemask(retype(dst, BRW_REGISTER_TYPE_D), BRW_WRITEMASK_X),
tmp_d, brw_imm_d(23));
release_tmp(c, tmp);
}
- if (dst.dw1.bits.writemask & WRITEMASK_Y) {
+ if (dst.dw1.bits.writemask & BRW_WRITEMASK_Y) {
/* result[1] = arg0.x - floor(arg0.x) */
- brw_FRC(p, brw_writemask(dst, WRITEMASK_Y), brw_swizzle1(arg0, 0));
+ brw_FRC(p, brw_writemask(dst, BRW_WRITEMASK_Y), brw_swizzle1(arg0, 0));
}
- if (dst.dw1.bits.writemask & WRITEMASK_Z) {
+ if (dst.dw1.bits.writemask & BRW_WRITEMASK_Z) {
/* As with the LOG instruction, we might be better off just
* doing a taylor expansion here, seeing as we have to do all
* the prep work.
*/
emit_math1(c,
BRW_MATH_FUNCTION_EXP,
- brw_writemask(dst, WRITEMASK_Z),
+ brw_writemask(dst, BRW_WRITEMASK_Z),
brw_swizzle1(arg0, 0),
BRW_MATH_PRECISION_FULL);
}
- if (dst.dw1.bits.writemask & WRITEMASK_W) {
+ if (dst.dw1.bits.writemask & BRW_WRITEMASK_W) {
/* result[3] = 1.0; */
- brw_MOV(p, brw_writemask(dst, WRITEMASK_W), brw_imm_f(1));
+ brw_MOV(p, brw_writemask(dst, BRW_WRITEMASK_W), brw_imm_f(1));
}
}
* result[0].f = (x.i & ((1<<31)-1) >> 23) - 127
* result[1].i = (x.i & ((1<<23)-1) + (127<<23)
*/
- if (dst.dw1.bits.writemask & WRITEMASK_XZ) {
+ if (dst.dw1.bits.writemask & BRW_WRITEMASK_XZ) {
brw_AND(p,
- brw_writemask(tmp_ud, WRITEMASK_X),
+ brw_writemask(tmp_ud, BRW_WRITEMASK_X),
brw_swizzle1(arg0_ud, 0),
brw_imm_ud((1U<<31)-1));
brw_SHR(p,
- brw_writemask(tmp_ud, WRITEMASK_X),
+ brw_writemask(tmp_ud, BRW_WRITEMASK_X),
tmp_ud,
brw_imm_ud(23));
brw_ADD(p,
- brw_writemask(tmp, WRITEMASK_X),
+ brw_writemask(tmp, BRW_WRITEMASK_X),
retype(tmp_ud, BRW_REGISTER_TYPE_D), /* does it matter? */
brw_imm_d(-127));
}
- if (dst.dw1.bits.writemask & WRITEMASK_YZ) {
+ if (dst.dw1.bits.writemask & BRW_WRITEMASK_YZ) {
brw_AND(p,
- brw_writemask(tmp_ud, WRITEMASK_Y),
+ brw_writemask(tmp_ud, BRW_WRITEMASK_Y),
brw_swizzle1(arg0_ud, 0),
brw_imm_ud((1<<23)-1));
brw_OR(p,
- brw_writemask(tmp_ud, WRITEMASK_Y),
+ brw_writemask(tmp_ud, BRW_WRITEMASK_Y),
tmp_ud,
brw_imm_ud(127<<23));
}
- if (dst.dw1.bits.writemask & WRITEMASK_Z) {
+ if (dst.dw1.bits.writemask & BRW_WRITEMASK_Z) {
/* result[2] = result[0] + LOG2(result[1]); */
/* Why bother? The above is just a hint how to do this with a
*/
emit_math1(c,
BRW_MATH_FUNCTION_LOG,
- brw_writemask(tmp, WRITEMASK_Z),
+ brw_writemask(tmp, BRW_WRITEMASK_Z),
brw_swizzle1(tmp, 1),
BRW_MATH_PRECISION_FULL);
brw_ADD(p,
- brw_writemask(tmp, WRITEMASK_Z),
+ brw_writemask(tmp, BRW_WRITEMASK_Z),
brw_swizzle1(tmp, 2),
brw_swizzle1(tmp, 0));
}
- if (dst.dw1.bits.writemask & WRITEMASK_W) {
+ if (dst.dw1.bits.writemask & BRW_WRITEMASK_W) {
/* result[3] = 1.0; */
- brw_MOV(p, brw_writemask(tmp, WRITEMASK_W), brw_imm_f(1));
+ brw_MOV(p, brw_writemask(tmp, BRW_WRITEMASK_W), brw_imm_f(1));
}
if (need_tmp) {
/* There must be a better way to do this:
*/
- if (dst.dw1.bits.writemask & WRITEMASK_X)
- brw_MOV(p, brw_writemask(dst, WRITEMASK_X), brw_imm_f(1.0));
- if (dst.dw1.bits.writemask & WRITEMASK_Y)
- brw_MUL(p, brw_writemask(dst, WRITEMASK_Y), arg0, arg1);
- if (dst.dw1.bits.writemask & WRITEMASK_Z)
- brw_MOV(p, brw_writemask(dst, WRITEMASK_Z), arg0);
- if (dst.dw1.bits.writemask & WRITEMASK_W)
- brw_MOV(p, brw_writemask(dst, WRITEMASK_W), arg1);
+ if (dst.dw1.bits.writemask & BRW_WRITEMASK_X)
+ brw_MOV(p, brw_writemask(dst, BRW_WRITEMASK_X), brw_imm_f(1.0));
+ if (dst.dw1.bits.writemask & BRW_WRITEMASK_Y)
+ brw_MUL(p, brw_writemask(dst, BRW_WRITEMASK_Y), arg0, arg1);
+ if (dst.dw1.bits.writemask & BRW_WRITEMASK_Z)
+ brw_MOV(p, brw_writemask(dst, BRW_WRITEMASK_Z), arg0);
+ if (dst.dw1.bits.writemask & BRW_WRITEMASK_W)
+ brw_MOV(p, brw_writemask(dst, BRW_WRITEMASK_W), arg1);
}
if (need_tmp)
tmp = get_tmp(c);
- brw_MOV(p, brw_writemask(dst, WRITEMASK_YZ), brw_imm_f(0));
- brw_MOV(p, brw_writemask(dst, WRITEMASK_XW), brw_imm_f(1));
+ brw_MOV(p, brw_writemask(dst, BRW_WRITEMASK_YZ), brw_imm_f(0));
+ brw_MOV(p, brw_writemask(dst, BRW_WRITEMASK_XW), brw_imm_f(1));
/* Need to use BRW_EXECUTE_8 and also do an 8-wide compare in order
* to get all channels active inside the IF. In the clipping code
brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_G, brw_swizzle1(arg0,0), brw_imm_f(0));
if_insn = brw_IF(p, BRW_EXECUTE_8);
{
- brw_MOV(p, brw_writemask(dst, WRITEMASK_Y), brw_swizzle1(arg0,0));
+ brw_MOV(p, brw_writemask(dst, BRW_WRITEMASK_Y), brw_swizzle1(arg0,0));
brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_G, brw_swizzle1(arg0,1), brw_imm_f(0));
- brw_MOV(p, brw_writemask(tmp, WRITEMASK_Z), brw_swizzle1(arg0,1));
+ brw_MOV(p, brw_writemask(tmp, BRW_WRITEMASK_Z), brw_swizzle1(arg0,1));
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
emit_math2(c,
BRW_MATH_FUNCTION_POW,
- brw_writemask(dst, WRITEMASK_Z),
+ brw_writemask(dst, BRW_WRITEMASK_Z),
brw_swizzle1(tmp, 2),
brw_swizzle1(arg0, 3),
BRW_MATH_PRECISION_PARTIAL);
/* ndc = 1.0 / pos.w */
emit_math1(c, BRW_MATH_FUNCTION_INV, ndc, brw_swizzle1(pos, 3), BRW_MATH_PRECISION_FULL);
/* ndc.xyz = pos * ndc */
- brw_MUL(p, brw_writemask(ndc, WRITEMASK_XYZ), pos, ndc);
+ brw_MUL(p, brw_writemask(ndc, BRW_WRITEMASK_XYZ), pos, ndc);
/* Update the header for point size, user clipping flags, and -ve rhw
* workaround.
if (c->prog_data.outputs_written & (1<<VERT_RESULT_PSIZ)) {
struct brw_reg psiz = c->regs[PROGRAM_OUTPUT][VERT_RESULT_PSIZ];
- brw_MUL(p, brw_writemask(header1, WRITEMASK_W), brw_swizzle1(psiz, 0), brw_imm_f(1<<11));
- brw_AND(p, brw_writemask(header1, WRITEMASK_W), header1, brw_imm_ud(0x7ff<<8));
+ brw_MUL(p, brw_writemask(header1, BRW_WRITEMASK_W), brw_swizzle1(psiz, 0), brw_imm_f(1<<11));
+ brw_AND(p, brw_writemask(header1, BRW_WRITEMASK_W), header1, brw_imm_ud(0x7ff<<8));
}
for (i = 0; i < c->key.nr_userclip; i++) {
brw_set_conditionalmod(p, BRW_CONDITIONAL_L);
brw_DP4(p, brw_null_reg(), pos, c->userplane[i]);
- brw_OR(p, brw_writemask(header1, WRITEMASK_W), header1, brw_imm_ud(1<<i));
+ brw_OR(p, brw_writemask(header1, BRW_WRITEMASK_W), header1, brw_imm_ud(1<<i));
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
}
brw_swizzle1(ndc, 3),
brw_imm_f(0));
- brw_OR(p, brw_writemask(header1, WRITEMASK_W), header1, brw_imm_ud(1<<6));
+ brw_OR(p, brw_writemask(header1, BRW_WRITEMASK_W), header1, brw_imm_ud(1<<6));
brw_MOV(p, ndc, brw_imm_f(0));
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
}
eot, /* writes complete */
0, /* urb destination offset */
BRW_URB_SWIZZLE_INTERLEAVE);
-
+!
if (c->first_overflow_output > 0) {
/* Not all of the vertex outputs/results fit into the MRF.
* Move the overflowed attributes from the GRF to the MRF and
--- /dev/null
+/**************************************************************************
+ *
+ * Copyright © 2009 Jakob Bornecrantz
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#ifndef BRW_WINSYS_H
+#define BRW_WINSYS_H
+
+#include "pipe/p_compiler.h"
+
+struct brw_winsys;
+struct pipe_fence_handle;
+
+/* This currently just wraps dri_bo:
+ */
+struct brw_winsys_buffer {
+ struct brw_winsys_screen *sws;
+ void *bo;
+ unsigned offset;
+};
+
+enum brw_buffer_usage {
+ I915_GEM_DOMAIN_RENDER,
+ I915_GEM_DOMAIN_SAMPLER,
+ I915_GEM_DOMAIN_VERTEX,
+ I915_GEM_DOMAIN_INSTRUCTION,
+
+
+ /* XXX: migrate from domains to explicit usage cases, eg below:
+ */
+
+ /* use on textures */
+ BRW_USAGE_RENDER = 0x01,
+ BRW_USAGE_SAMPLER = 0x02,
+ BRW_USAGE_2D_TARGET = 0x04,
+ BRW_USAGE_2D_SOURCE = 0x08,
+ /* use on vertex */
+ BRW_USAGE_VERTEX = 0x10,
+};
+
+enum brw_buffer_type
+{
+ BRW_BUFFER_TYPE_TEXTURE,
+ BRW_BUFFER_TYPE_SCANOUT, /**< a texture used for scanning out from */
+ BRW_BUFFER_TYPE_VERTEX,
+};
+
+
+/* AKA winsys context:
+ */
+struct brw_batchbuffer {
+
+ struct brw_winsys *iws;
+ struct brw_winsys_buffer *buf;
+
+ /**
+ * Values exported to speed up the writing the batchbuffer,
+ * instead of having to go trough a accesor function for
+ * each dword written.
+ */
+ /*{@*/
+ uint8_t *map;
+ uint8_t *ptr;
+ size_t size;
+
+ size_t relocs;
+ size_t max_relocs;
+ /*@}*/
+};
+
+struct brw_winsys_screen {
+
+ /**
+ * Batchbuffer functions.
+ */
+ /*@{*/
+ /**
+ * Create a new batchbuffer.
+ */
+ struct brw_batchbuffer *(*batchbuffer_create)(struct brw_winsys_screen *iws);
+
+ /**
+ * Emit a relocation to a buffer.
+ * Target position in batchbuffer is the same as ptr.
+ */
+ int (*batchbuffer_reloc)(struct brw_batchbuffer *batch,
+ unsigned offset,
+ struct brw_winsys_buffer *reloc,
+ unsigned pre_add,
+ enum brw_buffer_usage usage);
+
+ /**
+ * Flush a bufferbatch.
+ */
+ void (*batchbuffer_flush)(struct brw_batchbuffer *batch,
+ struct pipe_fence_handle **fence);
+
+ /**
+ * Destroy a batchbuffer.
+ */
+ void (*batchbuffer_destroy)(struct brw_batchbuffer *batch);
+ /*@}*/
+
+
+ /**
+ * Buffer functions.
+ */
+ /*@{*/
+ /**
+ * Create a buffer.
+ */
+ struct brw_winsys_buffer *(*buffer_create)(struct brw_winsys *iws,
+ unsigned size,
+ unsigned alignment,
+ enum brw_buffer_type type);
+
+
+ /* Reference and unreference buffers:
+ */
+ void (*bo_reference)( struct brw_winsys_buffer *buffer );
+ void (*bo_unreference)( struct brw_winsys_buffer *buffer );
+ void (*bo_emit_reloc)( struct brw_winsys_buffer *buffer,
+ unsigned domain,
+ unsigned a,
+ unsigned b,
+ unsigned offset,
+ struct brw_winsys_buffer *b2);
+
+ /**
+ * Map a buffer.
+ */
+ void *(*buffer_map)(struct brw_winsys *iws,
+ struct brw_winsys_buffer *buffer,
+ boolean write);
+
+ /**
+ * Unmap a buffer.
+ */
+ void (*buffer_unmap)(struct brw_winsys *iws,
+ struct brw_winsys_buffer *buffer);
+
+ /**
+ * Write to a buffer.
+ *
+ * Arguments follows pipe_buffer_write.
+ */
+ int (*buffer_write)(struct brw_winsys *iws,
+ struct brw_winsys_buffer *dst,
+ size_t offset,
+ size_t size,
+ const void *data);
+
+ void (*buffer_destroy)(struct brw_winsys *iws,
+ struct brw_winsys_buffer *buffer);
+ /*@}*/
+
+
+ /**
+ * Fence functions.
+ */
+ /*@{*/
+ /**
+ * Reference fence and set ptr to fence.
+ */
+ void (*fence_reference)(struct brw_winsys *iws,
+ struct pipe_fence_handle **ptr,
+ struct pipe_fence_handle *fence);
+
+ /**
+ * Check if a fence has finished.
+ */
+ int (*fence_signalled)(struct brw_winsys *iws,
+ struct pipe_fence_handle *fence);
+
+ /**
+ * Wait on a fence to finish.
+ */
+ int (*fence_finish)(struct brw_winsys *iws,
+ struct pipe_fence_handle *fence);
+ /*@}*/
+
+
+ /**
+ * Destroy the winsys.
+ */
+ void (*destroy)(struct brw_winsys *iws);
+};
+
+
+/**
+ * Create i915 pipe_screen.
+ */
+struct pipe_screen *i915_create_screen(struct brw_winsys *iws, unsigned pci_id);
+
+/**
+ * Create a i915 pipe_context.
+ */
+struct pipe_context *i915_create_context(struct pipe_screen *screen);
+
+/**
+ * Get the brw_winsys buffer backing the texture.
+ *
+ * TODO UGLY
+ */
+struct pipe_texture;
+boolean i915_get_texture_buffer_brw(struct pipe_texture *texture,
+ struct brw_winsys_buffer **buffer,
+ unsigned *stride);
+
+/**
+ * Wrap a brw_winsys buffer with a texture blanket.
+ *
+ * TODO UGLY
+ */
+struct pipe_texture * i915_texture_blanket_brw(struct pipe_screen *screen,
+ struct pipe_texture *tmplt,
+ unsigned pitch,
+ struct brw_winsys_buffer *buffer);
+
+
+
+
+#endif
#define BRW_WM_H
-#include "shader/prog_instruction.h"
#include "brw_context.h"
#include "brw_eu.h"
}
_mesa_printf("]");
- if (inst->writemask != WRITEMASK_XYZW)
+ if (inst->writemask != BRW_WRITEMASK_XYZW)
_mesa_printf(".%s%s%s%s",
GET_BIT(inst->writemask, 0) ? "x" : "",
GET_BIT(inst->writemask, 1) ? "y" : "",
/* Calculate pixel centers by adding 1 or 0 to each of the
* micro-tile coordinates passed in r1.
*/
- if (mask & WRITEMASK_X) {
+ if (mask & BRW_WRITEMASK_X) {
brw_ADD(p,
vec16(retype(dst[0], BRW_REGISTER_TYPE_UW)),
stride(suboffset(r1_uw, 4), 2, 4, 0),
brw_imm_v(0x10101010));
}
- if (mask & WRITEMASK_Y) {
+ if (mask & BRW_WRITEMASK_Y) {
brw_ADD(p,
vec16(retype(dst[1], BRW_REGISTER_TYPE_UW)),
stride(suboffset(r1_uw,5), 2, 4, 0),
/* Calc delta X,Y by subtracting origin in r1 from the pixel
* centers.
*/
- if (mask & WRITEMASK_X) {
+ if (mask & BRW_WRITEMASK_X) {
brw_ADD(p,
dst[0],
retype(arg0[0], BRW_REGISTER_TYPE_UW),
negate(r1));
}
- if (mask & WRITEMASK_Y) {
+ if (mask & BRW_WRITEMASK_Y) {
brw_ADD(p,
dst[1],
retype(arg0[1], BRW_REGISTER_TYPE_UW),
{
struct brw_compile *p = &c->func;
- if (mask & WRITEMASK_X) {
+ if (mask & BRW_WRITEMASK_X) {
/* X' = X */
brw_MOV(p,
dst[0],
/* XXX: is this needed any more, or is this a NOOP?
*/
- if (mask & WRITEMASK_Y) {
+ if (mask & BRW_WRITEMASK_Y) {
/* Y' = height - 1 - Y */
brw_ADD(p,
dst[1],
/* Don't need this if all you are doing is interpolating color, for
* instance.
*/
- if (mask & WRITEMASK_W) {
+ if (mask & BRW_WRITEMASK_W) {
struct brw_reg interp3 = brw_vec1_grf(arg0[0].nr+1, 4);
/* Calc 1/w - just linterp wpos[3] optimized by putting the
struct brw_reg r1_6ud = retype(brw_vec1_grf(1, 6), BRW_REGISTER_TYPE_UD);
GLuint i;
- if (!(mask & WRITEMASK_XYZW))
+ if (!(mask & BRW_WRITEMASK_XYZW))
return;
for (i = 0; i < 4; i++) {
BRW_VERTICAL_STRIDE_2,
BRW_WIDTH_2,
BRW_HORIZONTAL_STRIDE_0,
- BRW_SWIZZLE_XYZW, WRITEMASK_XYZW);
+ BRW_SWIZZLE_XYZW, BRW_WRITEMASK_XYZW);
src1 = brw_reg(arg0[i].file, arg0[i].nr, 0,
BRW_REGISTER_TYPE_F,
BRW_VERTICAL_STRIDE_2,
BRW_WIDTH_2,
BRW_HORIZONTAL_STRIDE_0,
- BRW_SWIZZLE_XYZW, WRITEMASK_XYZW);
+ BRW_SWIZZLE_XYZW, BRW_WRITEMASK_XYZW);
} else {
src0 = brw_reg(arg0[i].file, arg0[i].nr, 0,
BRW_REGISTER_TYPE_F,
BRW_VERTICAL_STRIDE_4,
BRW_WIDTH_4,
BRW_HORIZONTAL_STRIDE_0,
- BRW_SWIZZLE_XYZW, WRITEMASK_XYZW);
+ BRW_SWIZZLE_XYZW, BRW_WRITEMASK_XYZW);
src1 = brw_reg(arg0[i].file, arg0[i].nr, 2,
BRW_REGISTER_TYPE_F,
BRW_VERTICAL_STRIDE_4,
BRW_WIDTH_4,
BRW_HORIZONTAL_STRIDE_0,
- BRW_SWIZZLE_XYZW, WRITEMASK_XYZW);
+ BRW_SWIZZLE_XYZW, BRW_WRITEMASK_XYZW);
}
brw_ADD(p, dst[i], src0, negate(src1));
}
const struct brw_reg *arg0,
const struct brw_reg *arg1 )
{
- int dst_chan = _mesa_ffs(mask & WRITEMASK_XYZW) - 1;
+ int dst_chan = _mesa_ffs(mask & BRW_WRITEMASK_XYZW) - 1;
- if (!(mask & WRITEMASK_XYZW))
+ if (!(mask & BRW_WRITEMASK_XYZW))
return; /* Do not emit dead code */
- assert(is_power_of_two(mask & WRITEMASK_XYZW));
+ assert(is_power_of_two(mask & BRW_WRITEMASK_XYZW));
brw_MUL(p, brw_null_reg(), arg0[0], arg1[0]);
brw_MAC(p, brw_null_reg(), arg0[1], arg1[1]);
const struct brw_reg *arg0,
const struct brw_reg *arg1 )
{
- int dst_chan = _mesa_ffs(mask & WRITEMASK_XYZW) - 1;
+ int dst_chan = _mesa_ffs(mask & BRW_WRITEMASK_XYZW) - 1;
- if (!(mask & WRITEMASK_XYZW))
+ if (!(mask & BRW_WRITEMASK_XYZW))
return; /* Do not emit dead code */
- assert(is_power_of_two(mask & WRITEMASK_XYZW));
+ assert(is_power_of_two(mask & BRW_WRITEMASK_XYZW));
brw_MUL(p, brw_null_reg(), arg0[0], arg1[0]);
brw_MAC(p, brw_null_reg(), arg0[1], arg1[1]);
const struct brw_reg *arg0,
const struct brw_reg *arg1 )
{
- const int dst_chan = _mesa_ffs(mask & WRITEMASK_XYZW) - 1;
+ const int dst_chan = _mesa_ffs(mask & BRW_WRITEMASK_XYZW) - 1;
- if (!(mask & WRITEMASK_XYZW))
+ if (!(mask & BRW_WRITEMASK_XYZW))
return; /* Do not emit dead code */
- assert(is_power_of_two(mask & WRITEMASK_XYZW));
+ assert(is_power_of_two(mask & BRW_WRITEMASK_XYZW));
brw_MUL(p, brw_null_reg(), arg0[0], arg1[0]);
brw_MAC(p, brw_null_reg(), arg0[1], arg1[1]);
{
GLuint i;
- assert(!(mask & WRITEMASK_W) == WRITEMASK_X);
+ assert(!(mask & BRW_WRITEMASK_W) == BRW_WRITEMASK_X);
for (i = 0 ; i < 3; i++) {
if (mask & (1<<i)) {
GLuint mask,
const struct brw_reg *arg0 )
{
- int dst_chan = _mesa_ffs(mask & WRITEMASK_XYZW) - 1;
+ int dst_chan = _mesa_ffs(mask & BRW_WRITEMASK_XYZW) - 1;
- if (!(mask & WRITEMASK_XYZW))
+ if (!(mask & BRW_WRITEMASK_XYZW))
return; /* Do not emit dead code */
- assert(is_power_of_two(mask & WRITEMASK_XYZW));
+ assert(is_power_of_two(mask & BRW_WRITEMASK_XYZW));
brw_MOV(p, brw_message_reg(2), arg0[0]);
const struct brw_reg *arg0,
const struct brw_reg *arg1)
{
- int dst_chan = _mesa_ffs(mask & WRITEMASK_XYZW) - 1;
+ int dst_chan = _mesa_ffs(mask & BRW_WRITEMASK_XYZW) - 1;
- if (!(mask & WRITEMASK_XYZW))
+ if (!(mask & BRW_WRITEMASK_XYZW))
return; /* Do not emit dead code */
- assert(is_power_of_two(mask & WRITEMASK_XYZW));
+ assert(is_power_of_two(mask & BRW_WRITEMASK_XYZW));
brw_push_insn_state(p);
*/
switch (inst->tex_idx) {
case TEXTURE_1D_INDEX:
- emit = WRITEMASK_X;
+ emit = BRW_WRITEMASK_X;
nr = 1;
break;
case TEXTURE_2D_INDEX:
case TEXTURE_RECT_INDEX:
- emit = WRITEMASK_XY;
+ emit = BRW_WRITEMASK_XY;
nr = 2;
break;
case TEXTURE_3D_INDEX:
case TEXTURE_CUBE_INDEX:
- emit = WRITEMASK_XYZ;
+ emit = BRW_WRITEMASK_XYZ;
nr = 3;
break;
default:
if (inst->tex_shadow) {
nr = 4;
- emit |= WRITEMASK_W;
+ emit |= BRW_WRITEMASK_W;
}
msgLength = 1;
GLuint mask,
const struct brw_reg *arg0 )
{
- assert((mask & WRITEMASK_XW) == 0);
+ assert((mask & BRW_WRITEMASK_XW) == 0);
- if (mask & WRITEMASK_Y) {
+ if (mask & BRW_WRITEMASK_Y) {
brw_set_saturate(p, (mask & SATURATE) ? 1 : 0);
brw_MOV(p, dst[1], arg0[0]);
brw_set_saturate(p, 0);
}
- if (mask & WRITEMASK_Z) {
+ if (mask & BRW_WRITEMASK_Z) {
emit_math2(p, BRW_MATH_FUNCTION_POW,
&dst[2],
- WRITEMASK_X | (mask & SATURATE),
+ BRW_WRITEMASK_X | (mask & SATURATE),
&arg0[1],
&arg0[3]);
}
*/
brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_LE, arg0[0], brw_imm_f(0));
{
- if (mask & WRITEMASK_Y)
+ if (mask & BRW_WRITEMASK_Y)
brw_MOV(p, dst[1], brw_imm_f(0));
- if (mask & WRITEMASK_Z)
+ if (mask & BRW_WRITEMASK_Z)
brw_MOV(p, dst[2], brw_imm_f(0));
}
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
/* There is an scs math function, but it would need some
* fixup for 16-element execution.
*/
- if (dst_flags & WRITEMASK_X)
- emit_math1(p, BRW_MATH_FUNCTION_COS, dst, (dst_flags&SATURATE)|WRITEMASK_X, args[0]);
- if (dst_flags & WRITEMASK_Y)
- emit_math1(p, BRW_MATH_FUNCTION_SIN, dst+1, (dst_flags&SATURATE)|WRITEMASK_X, args[0]);
+ if (dst_flags & BRW_WRITEMASK_X)
+ emit_math1(p, BRW_MATH_FUNCTION_COS, dst, (dst_flags&SATURATE)|BRW_WRITEMASK_X, args[0]);
+ if (dst_flags & BRW_WRITEMASK_Y)
+ emit_math1(p, BRW_MATH_FUNCTION_SIN, dst+1, (dst_flags&SATURATE)|BRW_WRITEMASK_X, args[0]);
break;
case OPCODE_POW:
struct prog_dst_register reg;
reg.File = file;
reg.Index = idx;
- reg.WriteMask = WRITEMASK_XYZW;
+ reg.WriteMask = BRW_WRITEMASK_XYZW;
reg.RelAddr = 0;
reg.CondMask = COND_TR;
reg.CondSwizzle = 0;
*/
emit_op(c,
WM_PIXELXY,
- dst_mask(pixel_xy, WRITEMASK_XY),
+ dst_mask(pixel_xy, BRW_WRITEMASK_XY),
0,
payload_r0_depth,
src_undef(),
*/
emit_op(c,
WM_DELTAXY,
- dst_mask(delta_xy, WRITEMASK_XY),
+ dst_mask(delta_xy, BRW_WRITEMASK_XY),
0,
pixel_xy,
payload_r0_depth,
*/
emit_op(c,
WM_PIXELW,
- dst_mask(pixel_w, WRITEMASK_W),
+ dst_mask(pixel_w, BRW_WRITEMASK_W),
0,
interp_wpos,
deltas,
*/
emit_op(c,
WM_WPOSXY,
- dst_mask(dst, WRITEMASK_XY),
+ dst_mask(dst, BRW_WRITEMASK_XY),
0,
get_pixel_xy(c),
src_undef(),
src_undef());
- dst = dst_mask(dst, WRITEMASK_ZW);
+ dst = dst_mask(dst, BRW_WRITEMASK_ZW);
/* PROGRAM_INPUT.attr.xyzw = INTERP payload.interp[attr].x, deltas.xyw
*/
/* Interpolate the fog coordinate */
emit_op(c,
WM_PINTERP,
- dst_mask(dst, WRITEMASK_X),
+ dst_mask(dst, BRW_WRITEMASK_X),
0,
interp,
deltas,
emit_op(c,
TGSI_OPCODE_MOV,
- dst_mask(dst, WRITEMASK_YZW),
+ dst_mask(dst, BRW_WRITEMASK_YZW),
0,
src_swizzle(interp,
SWIZZLE_ZERO,
/* XXX review/test this case */
emit_op(c,
WM_FRONTFACING,
- dst_mask(dst, WRITEMASK_X),
+ dst_mask(dst, BRW_WRITEMASK_X),
0,
src_undef(),
src_undef(),
/* XXX review/test this case */
emit_op(c,
WM_PINTERP,
- dst_mask(dst, WRITEMASK_XY),
+ dst_mask(dst, BRW_WRITEMASK_XY),
0,
interp,
deltas,
emit_op(c,
TGSI_OPCODE_MOV,
- dst_mask(dst, WRITEMASK_ZW),
+ dst_mask(dst, BRW_WRITEMASK_ZW),
0,
src_swizzle(interp,
SWIZZLE_ZERO,
struct prog_src_register src1 = inst->SrcReg[1];
struct prog_dst_register dst = inst->DstReg;
- if (dst.WriteMask & WRITEMASK_Y) {
+ if (dst.WriteMask & BRW_WRITEMASK_Y) {
/* dst.y = mul src0.y, src1.y
*/
emit_op(c,
TGSI_OPCODE_MUL,
- dst_mask(dst, WRITEMASK_Y),
+ dst_mask(dst, BRW_WRITEMASK_Y),
inst->SaturateMode,
src0,
src1,
src_undef());
}
- if (dst.WriteMask & WRITEMASK_XZ) {
+ if (dst.WriteMask & BRW_WRITEMASK_XZ) {
struct prog_instruction *swz;
GLuint z = GET_SWZ(src0.Swizzle, Z);
*/
swz = emit_op(c,
TGSI_OPCODE_MOV,
- dst_mask(dst, WRITEMASK_XZ),
+ dst_mask(dst, BRW_WRITEMASK_XZ),
inst->SaturateMode,
src_swizzle(src0, SWIZZLE_ONE, z, z, z),
src_undef(),
/* Avoid letting negation flag of src0 affect our 1 constant. */
swz->SrcReg[0].Negate &= ~NEGATE_X;
}
- if (dst.WriteMask & WRITEMASK_W) {
+ if (dst.WriteMask & BRW_WRITEMASK_W) {
/* dst.w = mov src1.w
*/
emit_op(c,
TGSI_OPCODE_MOV,
- dst_mask(dst, WRITEMASK_W),
+ dst_mask(dst, BRW_WRITEMASK_W),
inst->SaturateMode,
src1,
src_undef(),
struct prog_src_register src0 = inst->SrcReg[0];
struct prog_dst_register dst = inst->DstReg;
- if (dst.WriteMask & WRITEMASK_XW) {
+ if (dst.WriteMask & BRW_WRITEMASK_XW) {
struct prog_instruction *swz;
/* dst.xw = swz src0.1111
*/
swz = emit_op(c,
TGSI_OPCODE_MOV,
- dst_mask(dst, WRITEMASK_XW),
+ dst_mask(dst, BRW_WRITEMASK_XW),
0,
src_swizzle1(src0, SWIZZLE_ONE),
src_undef(),
swz->SrcReg[0].Negate = NEGATE_NONE;
}
- if (dst.WriteMask & WRITEMASK_YZ) {
+ if (dst.WriteMask & BRW_WRITEMASK_YZ) {
emit_op(c,
TGSI_OPCODE_LIT,
- dst_mask(dst, WRITEMASK_YZ),
+ dst_mask(dst, BRW_WRITEMASK_YZ),
inst->SaturateMode,
src0,
src_undef(),
/* tmp0 = 1 / tmp1 */
emit_op(c, TGSI_OPCODE_RCP,
- dst_mask(tmp0, WRITEMASK_X),
+ dst_mask(tmp0, BRW_WRITEMASK_X),
0,
tmp1src,
src_undef(),
*/
emit_op(c,
TGSI_OPCODE_ADD,
- dst_mask(tmp, WRITEMASK_XYZ),
+ dst_mask(tmp, BRW_WRITEMASK_XYZ),
0,
tmpsrc,
C0,
emit_op(c,
TGSI_OPCODE_MUL,
- dst_mask(tmp, WRITEMASK_Y),
+ dst_mask(tmp, BRW_WRITEMASK_Y),
0,
tmpsrc,
src_swizzle1(C0, W),
emit_op(c,
TGSI_OPCODE_MAD,
- dst_mask(dst, WRITEMASK_XYZ),
+ dst_mask(dst, BRW_WRITEMASK_XYZ),
0,
swap_uv?src_swizzle(tmpsrc, Z,Z,X,X):src_swizzle(tmpsrc, X,X,Z,Z),
C1,
*/
emit_op(c,
TGSI_OPCODE_MAD,
- dst_mask(dst, WRITEMASK_Y),
+ dst_mask(dst, BRW_WRITEMASK_Y),
0,
src_swizzle1(tmpsrc, Z),
src_swizzle1(C1, W),
*/
emit_op(c,
TGSI_OPCODE_RCP,
- dst_mask(tmp, WRITEMASK_W),
+ dst_mask(tmp, BRW_WRITEMASK_W),
0,
src_swizzle1(src0, GET_SWZ(src0.Swizzle, W)),
src_undef(),
*/
emit_op(c,
TGSI_OPCODE_MUL,
- dst_mask(tmp, WRITEMASK_XYZ),
+ dst_mask(tmp, BRW_WRITEMASK_XYZ),
0,
src0,
src_swizzle1(src_reg_from_dst(tmp), W),
out = emit_insn(c, inst);
/* This should probably be done in the parser.
*/
- out->DstReg.WriteMask &= WRITEMASK_XY;
+ out->DstReg.WriteMask &= BRW_WRITEMASK_XY;
break;
case TGSI_OPCODE_DST:
out = emit_insn(c, inst);
/* This should probably be done in the parser.
*/
- out->DstReg.WriteMask &= WRITEMASK_XYZ;
+ out->DstReg.WriteMask &= BRW_WRITEMASK_XYZ;
break;
case TGSI_OPCODE_KIL:
#include "brw_context.h"
#include "brw_wm.h"
-#include "shader/prog_parameter.h"
{
switch (tex_idx) {
case TEXTURE_1D_INDEX:
- return WRITEMASK_X;
+ return BRW_WRITEMASK_X;
case TEXTURE_2D_INDEX:
- return WRITEMASK_XY;
+ return BRW_WRITEMASK_XY;
case TEXTURE_3D_INDEX:
- return WRITEMASK_XYZ;
+ return BRW_WRITEMASK_XYZ;
case TEXTURE_CUBE_INDEX:
- return WRITEMASK_XYZ;
+ return BRW_WRITEMASK_XYZ;
case TEXTURE_RECT_INDEX:
- return WRITEMASK_XY;
+ return BRW_WRITEMASK_XY;
default: return 0;
}
}
GLuint read0, read1, read2;
if (inst->opcode == TGSI_OPCODE_KIL) {
- track_arg(c, inst, 0, WRITEMASK_XYZW); /* All args contribute to final */
+ track_arg(c, inst, 0, BRW_WRITEMASK_XYZW); /* All args contribute to final */
continue;
}
if (inst->opcode == WM_FB_WRITE) {
- track_arg(c, inst, 0, WRITEMASK_XYZW);
- track_arg(c, inst, 1, WRITEMASK_XYZW);
+ track_arg(c, inst, 0, BRW_WRITEMASK_XYZW);
+ track_arg(c, inst, 1, BRW_WRITEMASK_XYZW);
if (c->key.source_depth_to_render_target &&
c->key.computes_depth)
- track_arg(c, inst, 2, WRITEMASK_Z);
+ track_arg(c, inst, 2, BRW_WRITEMASK_Z);
else
track_arg(c, inst, 2, 0);
continue;
break;
case TGSI_OPCODE_XPD:
- if (writemask & WRITEMASK_X) read0 |= WRITEMASK_YZ;
- if (writemask & WRITEMASK_Y) read0 |= WRITEMASK_XZ;
- if (writemask & WRITEMASK_Z) read0 |= WRITEMASK_XY;
+ if (writemask & BRW_WRITEMASK_X) read0 |= BRW_WRITEMASK_YZ;
+ if (writemask & BRW_WRITEMASK_Y) read0 |= BRW_WRITEMASK_XZ;
+ if (writemask & BRW_WRITEMASK_Z) read0 |= BRW_WRITEMASK_XY;
read1 = read0;
break;
case TGSI_OPCODE_SCS:
case WM_CINTERP:
case WM_PIXELXY:
- read0 = WRITEMASK_X;
+ read0 = BRW_WRITEMASK_X;
break;
case TGSI_OPCODE_POW:
- read0 = WRITEMASK_X;
- read1 = WRITEMASK_X;
+ read0 = BRW_WRITEMASK_X;
+ read1 = BRW_WRITEMASK_X;
break;
case TGSI_OPCODE_TEX:
read0 = get_texcoord_mask(inst->tex_idx);
if (inst->tex_shadow)
- read0 |= WRITEMASK_Z;
+ read0 |= BRW_WRITEMASK_Z;
break;
case TGSI_OPCODE_TXB:
/* Shadow ignored for txb.
*/
- read0 = get_texcoord_mask(inst->tex_idx) | WRITEMASK_W;
+ read0 = get_texcoord_mask(inst->tex_idx) | BRW_WRITEMASK_W;
break;
case WM_WPOSXY:
- read0 = writemask & WRITEMASK_XY;
+ read0 = writemask & BRW_WRITEMASK_XY;
break;
case WM_DELTAXY:
- read0 = writemask & WRITEMASK_XY;
- read1 = WRITEMASK_X;
+ read0 = writemask & BRW_WRITEMASK_XY;
+ read1 = BRW_WRITEMASK_X;
break;
case WM_PIXELW:
- read0 = WRITEMASK_X;
- read1 = WRITEMASK_XY;
+ read0 = BRW_WRITEMASK_X;
+ read1 = BRW_WRITEMASK_XY;
break;
case WM_LINTERP:
- read0 = WRITEMASK_X;
- read1 = WRITEMASK_XY;
+ read0 = BRW_WRITEMASK_X;
+ read1 = BRW_WRITEMASK_XY;
break;
case WM_PINTERP:
- read0 = WRITEMASK_X; /* interpolant */
- read1 = WRITEMASK_XY; /* deltas */
- read2 = WRITEMASK_W; /* pixel w */
+ read0 = BRW_WRITEMASK_X; /* interpolant */
+ read1 = BRW_WRITEMASK_XY; /* deltas */
+ read2 = BRW_WRITEMASK_W; /* pixel w */
break;
case TGSI_OPCODE_DP3:
- read0 = WRITEMASK_XYZ;
- read1 = WRITEMASK_XYZ;
+ read0 = BRW_WRITEMASK_XYZ;
+ read1 = BRW_WRITEMASK_XYZ;
break;
case TGSI_OPCODE_DPH:
- read0 = WRITEMASK_XYZ;
- read1 = WRITEMASK_XYZW;
+ read0 = BRW_WRITEMASK_XYZ;
+ read1 = BRW_WRITEMASK_XYZW;
break;
case TGSI_OPCODE_DP4:
- read0 = WRITEMASK_XYZW;
- read1 = WRITEMASK_XYZW;
+ read0 = BRW_WRITEMASK_XYZW;
+ read1 = BRW_WRITEMASK_XYZW;
break;
case TGSI_OPCODE_LIT:
- read0 = WRITEMASK_XYW;
+ read0 = BRW_WRITEMASK_XYW;
break;
case TGSI_OPCODE_DST:
#include "intel_mipmap_tree.h"
-#include "intel_batchbuffer.h"
+#include "brw_batchbuffer.h"
#include "intel_tex.h"
#include "intel_fbo.h"
+++ /dev/null
-#ifndef INTEL_BATCHBUFFER_H
-#define INTEL_BATCHBUFFER_H
-
-#include "intel_bufmgr.h"
-#include "intel_reg.h"
-
-#define BATCH_SZ 16384
-#define BATCH_RESERVED 16
-
-enum cliprect_mode {
- /**
- * Batchbuffer contents may be looped over per cliprect, but do not
- * require it.
- */
- IGNORE_CLIPRECTS,
- /**
- * Batchbuffer contents require looping over per cliprect at batch submit
- * time.
- *
- * This will be upgraded to NO_LOOP_CLIPRECTS when there's a single
- * constant cliprect, as in DRI2 or FBO rendering.
- */
- LOOP_CLIPRECTS,
- /**
- * Batchbuffer contents contain drawing that should not be executed multiple
- * times.
- */
- NO_LOOP_CLIPRECTS,
- /**
- * Batchbuffer contents contain drawing that already handles cliprects, such
- * as 2D drawing to front/back/depth that doesn't respect DRAWING_RECTANGLE.
- *
- * Equivalent behavior to NO_LOOP_CLIPRECTS, but may not persist in batch
- * outside of LOCK/UNLOCK. This is upgraded to just NO_LOOP_CLIPRECTS when
- * there's a constant cliprect, as in DRI2 or FBO rendering.
- */
- REFERENCES_CLIPRECTS
-};
-
-struct intel_batchbuffer
-{
- struct intel_context *intel;
-
- struct brw_winsys_buffer *buf;
-
- GLubyte *buffer;
-
- GLubyte *map;
- GLubyte *ptr;
-
- GLuint size;
-
- /** Tracking of BEGIN_BATCH()/OUT_BATCH()/ADVANCE_BATCH() debugging */
- struct {
- GLuint total;
- GLubyte *start_ptr;
- } emit;
-
- GLuint dirty_state;
-};
-
-struct intel_batchbuffer *intel_batchbuffer_alloc(struct intel_context
- *intel);
-
-void intel_batchbuffer_free(struct intel_batchbuffer *batch);
-
-
-void _intel_batchbuffer_flush(struct intel_batchbuffer *batch,
- const char *file, int line);
-
-#define intel_batchbuffer_flush(batch) \
- _intel_batchbuffer_flush(batch, __FILE__, __LINE__)
-
-void intel_batchbuffer_reset(struct intel_batchbuffer *batch);
-
-
-/* Unlike bmBufferData, this currently requires the buffer be mapped.
- * Consider it a convenience function wrapping multple
- * intel_buffer_dword() calls.
- */
-void intel_batchbuffer_data(struct intel_batchbuffer *batch,
- const void *data, GLuint bytes,
- enum cliprect_mode cliprect_mode);
-
-void intel_batchbuffer_release_space(struct intel_batchbuffer *batch,
- GLuint bytes);
-
-GLboolean intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
- struct brw_winsys_buffer *buffer,
- uint32_t read_domains,
- uint32_t write_domain,
- uint32_t offset);
-
-/* Inline functions - might actually be better off with these
- * non-inlined. Certainly better off switching all command packets to
- * be passed as structs rather than dwords, but that's a little bit of
- * work...
- */
-static INLINE GLint
-intel_batchbuffer_space(struct intel_batchbuffer *batch)
-{
- return (batch->size - BATCH_RESERVED) - (batch->ptr - batch->map);
-}
-
-
-static INLINE void
-intel_batchbuffer_emit_dword(struct intel_batchbuffer *batch, GLuint dword)
-{
- assert(batch->map);
- assert(intel_batchbuffer_space(batch) >= 4);
- *(GLuint *) (batch->ptr) = dword;
- batch->ptr += 4;
-}
-
-static INLINE void
-intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
- GLuint sz,
- enum cliprect_mode cliprect_mode)
-{
- assert(sz < batch->size - 8);
- if (intel_batchbuffer_space(batch) < sz)
- intel_batchbuffer_flush(batch);
-
- /* All commands should be executed once regardless of cliprect
- * mode.
- */
- (void)cliprect_mode;
-}
-
-/* Here are the crusty old macros, to be removed:
- */
-#define BATCH_LOCALS
-
-#define BEGIN_BATCH(n, cliprect_mode) do { \
- intel_batchbuffer_require_space(intel->batch, (n)*4, cliprect_mode); \
- assert(intel->batch->emit.start_ptr == NULL); \
- intel->batch->emit.total = (n) * 4; \
- intel->batch->emit.start_ptr = intel->batch->ptr; \
-} while (0)
-
-#define OUT_BATCH(d) intel_batchbuffer_emit_dword(intel->batch, d)
-
-#define OUT_RELOC(buf, read_domains, write_domain, delta) do { \
- assert((unsigned) (delta) < buf->size); \
- intel_batchbuffer_emit_reloc(intel->batch, buf, \
- read_domains, write_domain, delta); \
-} while (0)
-
-#define ADVANCE_BATCH() do { \
- unsigned int _n = intel->batch->ptr - intel->batch->emit.start_ptr; \
- assert(intel->batch->emit.start_ptr != NULL); \
- if (_n != intel->batch->emit.total) { \
- fprintf(stderr, "ADVANCE_BATCH: %d of %d dwords emitted\n", \
- _n, intel->batch->emit.total); \
- abort(); \
- } \
- intel->batch->emit.start_ptr = NULL; \
-} while(0)
-
-
-static INLINE void
-intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch)
-{
- intel_batchbuffer_require_space(batch, 4, IGNORE_CLIPRECTS);
- intel_batchbuffer_emit_dword(batch, MI_FLUSH);
-}
-
-#endif
projects / mesa.git / commitdiff