add dz/sz assertion in is_bc mode

diff --git a/src/openpower/sv/trans/svp64.py b/src/openpower/sv/trans/svp64.py
index 59611cc0f231761f4019c00c33ae5135fe71fbb0..37fb75669b783dff918011aa0a34b7ad5798f9df 100644 (file)
--- a/src/openpower/sv/trans/svp64.py
+++ b/src/openpower/sv/trans/svp64.py
@@ -1186,6 +1186,8 @@ class SVP64Asm:
                 elif encmode == 'cti':
                     svp64_rm.branch.CTR = 1
                     svp64_rm.branch.ctr.CTi = 1
+                elif encmode in ['dz', 'zz']:
+                    raise AssertionError("no encmode %s, use 'sz'" % encmode)
                 else:
                     raise AssertionError("unknown encmode %s" % encmode)
             else: