2007-04-19 Paul Brook <paul@codesourcery.com>

	gas/testsuite/
	* gas/arm/thumb1_unified.d: New test.
	* gas/arm/thumb1_unified.s: New test.

	gas/
	* config/tc-arm.c (md_assemble): Only allow 16-bit instructions on
	Thumb-1.  Add sanity check for bogus relaxations.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index f19ed525005245b4ddd93d4dcb1eb5015b4447cf..b6440a7fc976732729462f8fd6fe6f55480135b8 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2007-04-19  Paul Brook  <paul@codesourcery.com>
+
+       * config/tc-arm.c (md_assemble): Only allow 16-bit instructions on
+       Thumb-1.  Add sanity check for bogus relaxations.
+
 2007-04-19  Paul Brook  <paul@codesourcery.com>
 
        * config/tc-arm.c (insns): Allow rsb and rsbs on Thumb-1.

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 4e3afec0593e169e544ef27967b975e9aa8e3c02..62360f11e2e85abc7fbedd5ce77945aef08cb04f 100644 (file)
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -14110,6 +14110,14 @@ md_assemble (char *str)
          return;
        }
 
+      if (!ARM_CPU_HAS_FEATURE (variant, arm_ext_v6t2) && !inst.size_req)
+       {
+         /* Implicit require narrow instructions on Thumb-1.  This avoids
+            relaxation accidentally introducing Thumb-2 instructions.  */
+         if (opcode->tencode != do_t_blx && opcode->tencode != do_t_branch23)
+           inst.size_req = 2;
+       }
+
       /* Check conditional suffixes.  */
       if (current_it_mask)
        {
@@ -14151,6 +14159,11 @@ md_assemble (char *str)
              return;
            }
        }
+
+      /* Something has gone badly wrong if we try to relax a fixed size
+         instruction.  */
+      assert (inst.size_req == 0 || !inst.relax);
+
       ARM_MERGE_FEATURE_SETS (thumb_arch_used, thumb_arch_used,
                              *opcode->tvariant);
       /* Many Thumb-2 instructions also have Thumb-1 variants, so explicitly

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index d3dfee25fd4c23bdfdb261b7f75a2fd9df9d8cb8..10af40ceaf2f5e73965471d0dea5a372be0b729a 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2007-04-19  Paul Brook  <paul@codesourcery.com>
+
+       * gas/arm/thumb1_unified.d: New test.
+       * gas/arm/thumb1_unified.s: New test.
+
 2007-04-19  Nathan Froyd <froydnj@codesourcery.com>
 
        * gas/ppc/booke.s: Add tlbsx, tlbsxe.

diff --git a/gas/testsuite/gas/arm/thumb1_unified.d b/gas/testsuite/gas/arm/thumb1_unified.d
new file mode 100644 (file)
index 0000000..c2fdf30
--- /dev/null
+++ b/gas/testsuite/gas/arm/thumb1_unified.d
@@ -0,0 +1,20 @@
+# name: Thumb-1 unified
+# objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0[0-9a-f]+ <[^>]+> 200c        movs    r0, #12
+0[0-9a-f]+ <[^>]+> 1cd1        adds    r1, r2, #3
+0[0-9a-f]+ <[^>]+> 1ed1        subs    r1, r2, #3
+0[0-9a-f]+ <[^>]+> 3364        adds    r3, #100
+0[0-9a-f]+ <[^>]+> 3c83        subs    r4, #131
+0[0-9a-f]+ <[^>]+> 2d27        cmp     r5, #39
+0[0-9a-f]+ <[^>]+> a103        add     r1, pc, #12     \(adr [^)]*\)
+0[0-9a-f]+ <[^>]+> 4a03        ldr     r2, \[pc, #12\] \([^)]*\)
+0[0-9a-f]+ <[^>]+> 6863        ldr     r3, \[r4, #4\]
+0[0-9a-f]+ <[^>]+> 9d01        ldr     r5, \[sp, #4\]
+0[0-9a-f]+ <[^>]+> b001        add     sp, #4
+0[0-9a-f]+ <[^>]+> b081        sub     sp, #4
+0[0-9a-f]+ <[^>]+> af01        add     r7, sp, #4
+0[0-9a-f]+ <[^>]+> 4251        negs    r1, r2

diff --git a/gas/testsuite/gas/arm/thumb1_unified.s b/gas/testsuite/gas/arm/thumb1_unified.s
new file mode 100644 (file)
index 0000000..c8da6ec
--- /dev/null
+++ b/gas/testsuite/gas/arm/thumb1_unified.s
@@ -0,0 +1,25 @@
+.text
+.arch armv4t
+.syntax unified
+.thumb
+foo:
+movs r0, #12
+adds r1, r2, #3
+subs r1, r2, #3
+adds r3, r3, #0x64
+subs r4, r4, #0x83
+cmp r5, #0x27
+
+adr r1, bar
+ldr r2, bar
+ldr r3, [r4, #4]
+ldr r5, [sp, #4]
+add sp, sp, #4
+sub sp, sp, #4
+add r7, sp, #4
+
+rsbs r1, r2, #0
+
+.align 2
+bar:
+