* It improves texture upload performance by keeping the DMA
* engine busy while uploads are being submitted.
*/
- if (rctx->ws->cs_query_memory_usage(rctx->dma.cs) > 64 * 1024 * 1024) {
+ if (cs->used_vram + cs->used_gart > 64 * 1024 * 1024) {
rctx->dma.flush(rctx, RADEON_FLUSH_ASYNC, NULL);
return;
}
bool (*cs_memory_below_limit)(struct radeon_winsys_cs *cs,
uint64_t vram, uint64_t gtt);
- uint64_t (*cs_query_memory_usage)(struct radeon_winsys_cs *cs);
-
/**
* Return the buffer list.
*
return gtt < ws->info.gart_size * 0.7;
}
-static uint64_t amdgpu_cs_query_memory_usage(struct radeon_winsys_cs *rcs)
-{
- return rcs->used_vram + rcs->used_gart;
-}
-
static unsigned amdgpu_cs_get_buffer_list(struct radeon_winsys_cs *rcs,
struct radeon_bo_list_item *list)
{
ws->base.cs_validate = amdgpu_cs_validate;
ws->base.cs_check_space = amdgpu_cs_check_space;
ws->base.cs_memory_below_limit = amdgpu_cs_memory_below_limit;
- ws->base.cs_query_memory_usage = amdgpu_cs_query_memory_usage;
ws->base.cs_get_buffer_list = amdgpu_cs_get_buffer_list;
ws->base.cs_flush = amdgpu_cs_flush;
ws->base.cs_is_buffer_referenced = amdgpu_bo_is_referenced;
return gtt < cs->ws->info.gart_size * 0.7;
}
-static uint64_t radeon_drm_cs_query_memory_usage(struct radeon_winsys_cs *rcs)
-{
- return rcs->used_vram + rcs->used_gart;
-}
-
static unsigned radeon_drm_cs_get_buffer_list(struct radeon_winsys_cs *rcs,
struct radeon_bo_list_item *list)
{
ws->base.cs_validate = radeon_drm_cs_validate;
ws->base.cs_check_space = radeon_drm_cs_check_space;
ws->base.cs_memory_below_limit = radeon_drm_cs_memory_below_limit;
- ws->base.cs_query_memory_usage = radeon_drm_cs_query_memory_usage;
ws->base.cs_get_buffer_list = radeon_drm_cs_get_buffer_list;
ws->base.cs_flush = radeon_drm_cs_flush;
ws->base.cs_is_buffer_referenced = radeon_bo_is_referenced;