GLuint *Elts;
- struct radeon_dma_region indexed_verts;
struct radeon_dma_region vertex_data[15];
};
struct radeon_bo *bo;
void (*flush) (r200ContextPtr);
- struct radeon_dma_region indexed_verts;
};
{
r200ContextPtr rmesa = R200_CONTEXT(ctx);
- // if (rmesa->swtcl.indexed_verts.buf)
- // r200ReleaseDmaRegion( rmesa, &rmesa->swtcl.indexed_verts, __FUNCTION__ );
}
extern void r200PrintSetupFlags(char *msg, GLuint flags );
-extern void r200_emit_indexed_verts( GLcontext *ctx,
- GLuint start,
- GLuint count );
-
extern void r200_translate_vertex( GLcontext *ctx,
const radeonVertex *src,
SWvertex *dst );
rmesa->dma.flush = NULL;
- // if (rmesa->swtcl.indexed_verts.buf)
- // r200ReleaseDmaRegion( rmesa, &rmesa->swtcl.indexed_verts,
- // __FUNCTION__ );
-
R200_STATECHANGE( rmesa, vap );
rmesa->hw.vap.cmd[VAP_SE_VAP_CNTL] |= R200_VAP_TCL_ENABLE;
rmesa->hw.vap.cmd[VAP_SE_VAP_CNTL] &= ~R200_VAP_FORCE_W_TO_ONE;