Disable auto prefetcher for -march=znver1.

2016-02-04  Victoria Stepanyan  <victoria.stepanyan@amd.com>

        * gcc/config/i386/x86-tune.def: Disable default prefetching
        for -march=znver1.

From-SVN: r233127

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f379bc4c294ea159733e8676a1d65f37160b2566..5a06f6735cbc51c19d4473ac9a6991e274dbda54 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2016-02-04  Victoria Stepanyan  <victoria.stepanyan@amd.com>
+
+       * gcc/config/i386/x86-tune.def: Disable default prefetching 
+       for -march=znver1.
+
 2016-02-03  Michael Meissner  <meissner@linux.vnet.ibm.com>
            Vladimir Makarov  <vmakarov@redhat.com>
 

diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def
index 9d25e51d40788aca504453a4f778f259a3b1a144..31a87b913b26c3c4256cc4e297a75aaf4aaa19aa 100644 (file)
--- a/gcc/config/i386/x86-tune.def
+++ b/gcc/config/i386/x86-tune.def
@@ -218,7 +218,7 @@ DEF_TUNE (X86_TUNE_FOUR_JUMP_LIMIT, "four_jump_limit",
    at -O3.  For the moment, the prefetching seems badly tuned for Intel
    chips.  */
 DEF_TUNE (X86_TUNE_SOFTWARE_PREFETCHING_BENEFICIAL, "software_prefetching_beneficial",
-          m_K6_GEODE | m_AMD_MULTIPLE)
+          m_K6_GEODE | m_ATHLON_K8 | m_AMDFAM10 | m_BDVER | m_BTVER)
 
 /* X86_TUNE_LCP_STALL: Avoid an expensive length-changing prefix stall
    on 16-bit immediate moves into memory on Core2 and Corei7.  */