* Taking the simplicity of the RISC paradigm and applying it strictly and
uniformly to create a Scalable Vector ISA.
-* Simplicity of introduction and implementation on top of
- the existing Power ISA without disruption.
* Effectively a hardware for-loop, pausing PC, issuing multiple scalar
operations
* Preserving the underlying scalar execution dependencies as if the
Advantages of these design principles:
+* Simplicity of introduction and implementation on top of
+ the existing Power ISA without disruption.
* It is therefore easy to create a first (and sometimes only)
implementation as literally a for-loop in hardware, simulators, and
compilers.