i965: Delete update_renderbuffer_surface flags.
authorKenneth Graunke <kenneth@whitecape.org>
Thu, 17 Aug 2017 07:58:43 +0000 (00:58 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Wed, 23 Aug 2017 18:55:17 +0000 (11:55 -0700)
We don't need yet another set of flags.  The function already has access
to both brw and the unit, so it can check brw->draw_aux_buffer_disabled
itself in one line of code.  The layered flag was only used to assert
that Gen4-5 doesn't do layered rendering, which isn't that useful.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
src/mesa/drivers/dri/i965/brw_context.h
src/mesa/drivers/dri/i965/brw_wm_surface_state.c

index 932240bfc505e7ad5ca62c2af1892347cd968733..94c0a1b9636e596f2615334a83a9c3c7c57e4c73 100644 (file)
@@ -635,7 +635,7 @@ struct brw_context
    {
       uint32_t (*update_renderbuffer_surface)(struct brw_context *brw,
                                               struct gl_renderbuffer *rb,
-                                              uint32_t flags, unsigned unit,
+                                              unsigned unit,
                                               uint32_t surf_index);
 
       /**
index 8d6330032f9cbfb82305df2325b9d40cbd27d85b..f63b9d2ed51788ef0a00c3f296b8b6d2442b945d 100644 (file)
 #include "brw_defines.h"
 #include "brw_wm.h"
 
-enum {
-   INTEL_RENDERBUFFER_LAYERED = 1 << 0,
-   INTEL_AUX_BUFFER_DISABLED = 1 << 1,
-};
-
 uint32_t tex_mocs[] = {
    [7] = GEN7_MOCS_L3,
    [8] = BDW_MOCS_WB,
@@ -209,7 +204,7 @@ brw_emit_surface_state(struct brw_context *brw,
 static uint32_t
 gen6_update_renderbuffer_surface(struct brw_context *brw,
                                  struct gl_renderbuffer *rb,
-                                 uint32_t flags, unsigned unit,
+                                 unsigned unit,
                                  uint32_t surf_index)
 {
    struct gl_context *ctx = &brw->ctx;
@@ -217,14 +212,10 @@ gen6_update_renderbuffer_surface(struct brw_context *brw,
    struct intel_mipmap_tree *mt = irb->mt;
 
    enum isl_aux_usage aux_usage =
+      brw->draw_aux_buffer_disabled[unit] ? ISL_AUX_USAGE_NONE :
       intel_miptree_render_aux_usage(brw, mt, ctx->Color.sRGBEnabled,
                                      ctx->Color.BlendEnabled & (1 << unit));
 
-   if (flags & INTEL_AUX_BUFFER_DISABLED) {
-      assert(brw->gen >= 9);
-      aux_usage = ISL_AUX_USAGE_NONE;
-   }
-
    assert(brw_render_target_supported(brw, rb));
 
    mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb));
@@ -897,7 +888,7 @@ emit_null_surface_state(struct brw_context *brw,
 static uint32_t
 gen4_update_renderbuffer_surface(struct brw_context *brw,
                                  struct gl_renderbuffer *rb,
-                                 uint32_t flags, unsigned unit,
+                                 unsigned unit,
                                  uint32_t surf_index)
 {
    struct gl_context *ctx = &brw->ctx;
@@ -911,9 +902,6 @@ gen4_update_renderbuffer_surface(struct brw_context *brw,
    mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb));
    /* BRW_NEW_FS_PROG_DATA */
 
-   assert(!(flags & INTEL_RENDERBUFFER_LAYERED));
-   assert(!(flags & INTEL_AUX_BUFFER_DISABLED));
-
    if (rb->TexImage && !brw->has_surface_tile_offset) {
       intel_renderbuffer_get_tile_offsets(irb, &tile_x, &tile_y);
 
@@ -1012,15 +1000,11 @@ brw_update_renderbuffer_surfaces(struct brw_context *brw,
    if (fb->_NumColorDrawBuffers >= 1) {
       for (i = 0; i < fb->_NumColorDrawBuffers; i++) {
          const uint32_t surf_index = render_target_start + i;
-         const int flags = (_mesa_geometric_layers(fb) > 0 ?
-                              INTEL_RENDERBUFFER_LAYERED : 0) |
-                           (brw->draw_aux_buffer_disabled[i] ?
-                              INTEL_AUX_BUFFER_DISABLED : 0);
 
         if (intel_renderbuffer(fb->_ColorDrawBuffers[i])) {
             surf_offset[surf_index] =
                brw->vtbl.update_renderbuffer_surface(
-                  brw, fb->_ColorDrawBuffers[i], flags, i, surf_index);
+                  brw, fb->_ColorDrawBuffers[i], i, surf_index);
         } else {
             emit_null_surface_state(brw, w, h, s, &surf_offset[surf_index]);
         }