vfp.md (arm_movsi_vfp): Hide VFP register classes from register preferencing.

* arm/vfp.md (arm_movsi_vfp): Hide VFP register classes from register
preferencing.

From-SVN: r92948

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ff13de618d4b04b33541d7a44c95a48a37a9e968..8cd7bb601fcd94b8ebbb2bba05db2096e4e76c31 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2004-01-05  Richard Earnshaw  <rearnsha@arm.com>
+
+       * arm/vfp.md (arm_movsi_vfp): Hide VFP register classes from register
+       preferencing.
+
 2004-01-05  Uros Bizjak  <uros@kss-loka.si>
 
        * doc/invoke.texi (Intel 386 and AMD x86-64 Options):

diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md
index c6a485d8617ecf1df38b40a12b9c1485ebaee2cd..1116ea2bd9bd1e1951e22ed1376ea1b564f36a4e 100644 (file)
--- a/gcc/config/arm/vfp.md
+++ b/gcc/config/arm/vfp.md
@@ -111,8 +111,8 @@
 ;; ??? For now do not allow loading constants into vfp regs.  This causes
 ;; problems because small constants get converted into adds.
 (define_insn "*arm_movsi_vfp"
-  [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r ,m,!w,r,!w,!w,  Uv")
-      (match_operand:SI 1 "general_operand"       "rI,K,mi,r,r,!w,!w,Uvi,!w"))]
+  [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r ,m,*w,r,*w,*w, *Uv")
+      (match_operand:SI 1 "general_operand"       "rI,K,mi,r,r,*w,*w,*Uvi,*w"))]
   "TARGET_ARM && TARGET_VFP && TARGET_HARD_FLOAT
    && (   s_register_operand (operands[0], SImode)
        || s_register_operand (operands[1], SImode))"