radeong: Don't allocate HW BOs for constantbufs.
authorCorbin Simpson <MostAwesomeDude@gmail.com>
Mon, 18 Jan 2010 10:30:49 +0000 (02:30 -0800)
committerCorbin Simpson <MostAwesomeDude@gmail.com>
Mon, 18 Jan 2010 10:35:08 +0000 (02:35 -0800)
We have broken 1000 FPS. Hell yes.

Heavily inspired by Marek's patch, but using pipebuffer instead of
a roll-your-own malloc.

src/gallium/winsys/drm/radeon/core/radeon_buffer.c
src/gallium/winsys/drm/radeon/core/radeon_buffer.h
src/gallium/winsys/drm/radeon/core/radeon_drm.c
src/gallium/winsys/drm/radeon/core/radeon_drm.h

index 385fa857b561270b353cfdec36844767732af361..b020ff38fa05e720cf7da224d96f7ab2fd6f0d6d 100644 (file)
@@ -58,6 +58,7 @@ static struct pipe_buffer *radeon_buffer_create(struct pipe_winsys *ws,
 {
     struct radeon_winsys *radeon_ws = (struct radeon_winsys *)ws;
     struct radeon_pipe_buffer *radeon_buffer;
+    struct pb_desc desc;
     uint32_t domain;
 
     radeon_buffer = CALLOC_STRUCT(radeon_pipe_buffer);
@@ -70,6 +71,14 @@ static struct pipe_buffer *radeon_buffer_create(struct pipe_winsys *ws,
     radeon_buffer->base.usage = usage;
     radeon_buffer->base.size = size;
 
+    if (usage == PIPE_BUFFER_USAGE_CONSTANT && is_r3xx(radeon_ws->pci_id)) {
+        /* Don't bother allocating a BO, as it'll never get to the card. */
+        desc.alignment = alignment;
+        desc.usage = usage;
+        radeon_buffer->pb = pb_malloc_buffer_create(size, &desc);
+        return &radeon_buffer->base;
+    }
+
     domain = 0;
 
     if (usage & PIPE_BUFFER_USAGE_PIXEL) {
@@ -133,8 +142,16 @@ static void radeon_buffer_del(struct pipe_buffer *buffer)
     struct radeon_pipe_buffer *radeon_buffer =
         (struct radeon_pipe_buffer*)buffer;
 
-    radeon_bo_unref(radeon_buffer->bo);
-    free(radeon_buffer);
+    if (radeon_buffer->pb) {
+        pipe_reference_init(&radeon_buffer->pb->base.reference, 0);
+        pb_destroy(radeon_buffer->pb);
+    }
+
+    if (radeon_buffer->bo) {
+        radeon_bo_unref(radeon_buffer->bo);
+    }
+
+    FREE(radeon_buffer);
 }
 
 static void *radeon_buffer_map(struct pipe_winsys *ws,
@@ -146,6 +163,10 @@ static void *radeon_buffer_map(struct pipe_winsys *ws,
         (struct radeon_pipe_buffer*)buffer;
     int write = 0;
 
+    if (radeon_buffer->pb) {
+        return pb_map(radeon_buffer->pb, flags);
+    }
+
     if (flags & PIPE_BUFFER_USAGE_DONTBLOCK) {
         uint32_t domain;
 
@@ -174,7 +195,11 @@ static void radeon_buffer_unmap(struct pipe_winsys *ws,
     struct radeon_pipe_buffer *radeon_buffer =
         (struct radeon_pipe_buffer*)buffer;
 
-    radeon_bo_unmap(radeon_buffer->bo);
+    if (radeon_buffer->pb) {
+        pb_unmap(radeon_buffer->pb);
+    } else {
+        radeon_bo_unmap(radeon_buffer->bo);
+    }
 }
 
 static void radeon_fence_reference(struct pipe_winsys *ws,
index d7f17564a9f75b780711bf30fd824ac360242393..de71cb2f42d84a9635348b7303552e9bd7dc212e 100644 (file)
@@ -36,7 +36,7 @@
 #include "pipe/p_defines.h"
 #include "pipe/p_inlines.h"
 
-//#include "state_tracker/st_public.h"
+#include "pipebuffer/pb_buffer.h"
 
 #include "util/u_memory.h"
 
 
 struct radeon_pipe_buffer {
     struct pipe_buffer  base;
+    /* Pointer to GPU-backed BO. */
     struct radeon_bo    *bo;
+    /* Pointer to fallback PB buffer. */
+    struct pb_buffer    *pb;
     boolean flinked;
     uint32_t flink;
 };
index 572c5df458e7e5d406c20dcb1c1a365956190193..9552f0ad6a9cafd9d27be4ab323563a7f0f611ca 100644 (file)
@@ -120,14 +120,6 @@ static void do_ioctls(int fd, struct radeon_winsys* winsys)
     drmFreeVersion(version);
 }
 
-/* Guess at whether this chipset should use r300g.
- *
- * I believe that this check is valid, but I haven't been exhaustive. */
-static boolean is_r3xx(int pciid)
-{
-    return (pciid > 0x3150) && (pciid < 0x796f);
-}
-
 /* Create a pipe_screen. */
 struct pipe_screen* radeon_create_screen(struct drm_api* api,
                                          int drmFB,
index 28f2ba818e904fa809515da892666e35859f37a1..ddd7983824a5e04f64607d57671271e7e535f7c6 100644 (file)
@@ -77,4 +77,13 @@ boolean radeon_global_handle_from_buffer(struct drm_api* api,
                                          unsigned* handle);
 
 void radeon_destroy_drm_api(struct drm_api* api);
+
+/* Guess at whether this chipset should use r300g.
+ *
+ * I believe that this check is valid, but I haven't been exhaustive. */
+static boolean is_r3xx(int pciid)
+{
+    return (pciid > 0x3150) && (pciid < 0x796f);
+}
+
 #endif