S/390: PR79904: Disallow reg + sym_ref literal pool addresses.

We accept reg + sym_ref as valid address if sym_ref is a literal pool
reference knowing that it will be rewritten as r13 + reg + offset.
However, annotate_constant_pool_refs was never able to handle that.

With the patch only single sym_refs are accepted.

Regression tested on s390x.

2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	PR target/79904
	* config/s390/s390.c (s390_decompose_address): Reject reg +
	sym_ref literal pool references.

gcc/testsuite/ChangeLog:

2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* gcc.dg/ubsan/pr79904-2.c: New test.

From-SVN: r246443

diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index e7ab128252bb0d9cb2800da02ec464c13023f6a8..27640adfaec538200d0d15d1463f1b50e562546e 100644 (file)
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -2842,13 +2842,10 @@ s390_decompose_address (rtx addr, struct s390_address *out)
      displacements by basing them off the base register.  */
   if (disp && GET_CODE (disp) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (disp))
     {
-      /* Either base or index must be free to hold the base register.  */
-      if (!base)
-        base = fake_pool_base, literal_pool = true;
-      else if (!indx)
-        indx = fake_pool_base, literal_pool = true;
-      else
-        return false;
+      if (base || indx)
+       return false;
+
+      base = fake_pool_base, literal_pool = true;
 
       /* Mark up the displacement.  */
       disp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, disp),

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 96eedbd2cee5e2234cc8450628558b769d60fd97..316efb472775fe5e89800350848b84124cf566d9 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+       * gcc.dg/ubsan/pr79904-2.c: New test.
+
 2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 
        PR target/79893

diff --git a/gcc/testsuite/gcc.dg/ubsan/pr79904-2.c b/gcc/testsuite/gcc.dg/ubsan/pr79904-2.c
new file mode 100644 (file)
index 0000000..c99c43d
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/ubsan/pr79904-2.c
@@ -0,0 +1,11 @@
+/* PR sanitizer/79904 */
+/* { dg-do compile } */
+/* { dg-options "-fsanitize=signed-integer-overflow" } */
+
+typedef signed char V __attribute__((vector_size (8))); 
+
+void
+foo (V *a) 
+{ 
+  *a = *a * (V) { 3, 4, 5, 6, 7, 8, 9, 10 }; 
+}