+2003-01-29 Kazu Hirata <kazu@cs.umass.edu>
+
+ * config/h8300/h8300.h (PREDICATE_CODES): Add entries for
+ general_operand_src and general_operand_dst.
+
2003-01-29 David Edelsohn <edelsohn@gnu.org>
* config/rs6000/rs6000.c (function_arg_pass_by_reference):
(LEGITIMIZE_ADDRESS, THUMB_LEGITIMIZE_ADDRESS): Wrap with
do ... while (0)
-2003-01-29 Joel Sherrill <joel@OARcorp.com>
+2003-01-29 Joel Sherrill <joel@OARcorp.com>
* gthr-rtems.h: Define __GTHREAD_MUTEX_INIT. Apparently no code
depended on it being defined until now. This was tracked as PR9296.
-2003-01-13 Joel Sherrill <joel@OARcorp.com>
+2003-01-13 Joel Sherrill <joel@OARcorp.com>
* config/mips/rtems.h: Predefine __USE_INIT_FINI__ so generic
RTEMS code knows which C++ initialization style the toolset
configuration is using. This was tracked as PR9295.
-2003-01-29 Joel Sherrill <joel@OARcorp.com>
+2003-01-29 Joel Sherrill <joel@OARcorp.com>
* config/m68k/t-crtstuff: Replace spaces with tabs, add
$(MULTILIB_CFLAGS) as compiler option and multilib crtbegin/end.o.
This issue was tracked as PR9293.
-2003-01-29 Joel Sherrill <joel@OARcorp.com>
+2003-01-29 Joel Sherrill <joel@OARcorp.com>
* config.gcc (hppa1.1-rtems): Did not include t-rtems nor enable
RTEMS threads.
/* Define the codes that are matched by predicates in h8300.c. */
-#define PREDICATE_CODES \
- {"single_one_operand", {CONST_INT}}, \
- {"single_zero_operand", {CONST_INT}}, \
- {"call_insn_operand", {MEM}}, \
- {"small_call_insn_operand", {MEM}}, \
- {"jump_address_operand", {REG, MEM}}, \
- {"two_insn_adds_subs_operand", {CONST_INT}}, \
- {"bit_operand", {REG, SUBREG, MEM}}, \
- {"bit_memory_operand", {MEM}}, \
- {"stack_pointer_operand", {REG}}, \
- {"const_int_le_2_operand", {CONST_INT}}, \
- {"const_int_le_6_operand", {CONST_INT}}, \
- {"const_int_gt_2_operand", {CONST_INT}}, \
- {"const_int_ge_8_operand", {CONST_INT}}, \
- {"const_int_qi_operand", {CONST_INT}}, \
- {"const_int_hi_operand", {CONST_INT}}, \
- {"incdec_operand", {CONST_INT}}, \
- {"bit_operator", {XOR, AND, IOR}}, \
- {"nshift_operator", {ASHIFTRT, LSHIFTRT, ASHIFT}}, \
+#define PREDICATE_CODES \
+ {"general_operand_src", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \
+ LABEL_REF, SUBREG, REG, MEM, ADDRESSOF}}, \
+ {"general_operand_dst", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \
+ LABEL_REF, SUBREG, REG, MEM, ADDRESSOF}}, \
+ {"single_one_operand", {CONST_INT}}, \
+ {"single_zero_operand", {CONST_INT}}, \
+ {"call_insn_operand", {MEM}}, \
+ {"small_call_insn_operand", {MEM}}, \
+ {"jump_address_operand", {REG, MEM}}, \
+ {"two_insn_adds_subs_operand", {CONST_INT}}, \
+ {"bit_operand", {REG, SUBREG, MEM}}, \
+ {"bit_memory_operand", {MEM}}, \
+ {"stack_pointer_operand", {REG}}, \
+ {"const_int_le_2_operand", {CONST_INT}}, \
+ {"const_int_le_6_operand", {CONST_INT}}, \
+ {"const_int_gt_2_operand", {CONST_INT}}, \
+ {"const_int_ge_8_operand", {CONST_INT}}, \
+ {"const_int_qi_operand", {CONST_INT}}, \
+ {"const_int_hi_operand", {CONST_INT}}, \
+ {"incdec_operand", {CONST_INT}}, \
+ {"bit_operator", {XOR, AND, IOR}}, \
+ {"nshift_operator", {ASHIFTRT, LSHIFTRT, ASHIFT}}, \
{"eqne_operator", {EQ, NE}},
#endif /* ! GCC_H8300_H */