re PR target/36222 (x86 fails to optimize out __v4si -> __m128i move)

        PR target/36222
        * config/i386/i386.c (ix86_expand_vector_init_general): Rearrange op0
        and op1 expansion before vector concat to have less live pseudos.

testsuite/ChangeLog:

        PR target/36222
        * gcc.target/i386/pr36222-1.c: New test.

From-SVN: r135275

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 246bf13fcb0d16eaae560313a908ea21bccf0543..17a46138693382e3c238dd1d5b43836dee38041d 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2008-05-13  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/36222
+       * config/i386/i386.c (ix86_expand_vector_init_general): Rearrange op0
+       and op1 expansion before vector concat to have less live pseudos.
+
 2008-05-13  H.J. Lu  <hongjiu.lu@intel.com>
 
        * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): Use
@@ -10,23 +16,19 @@
 
        * tree.h (init_phinodes, fini_phinodes, release_phi_node,
        phinodes_print_statistics, init_ssanames, fini_ssanames,
-       make_ssa_name, duplicate_ssa_name,
-       duplicate_ssa_name_ptr_info, release_ssa_name,
-       release_defs, replace_ssa_name_symbol,
+       make_ssa_name, duplicate_ssa_name, duplicate_ssa_name_ptr_info,
+       release_ssa_name, release_defs, replace_ssa_name_symbol,
        ssanames_print_statistics): Move ...
        * tree-flow.h: ... here.
-       * tree-ssanames.c (init_ssanames): Add arguments FN and
-       SIZE.  Use FN instead of cfun.
+       * tree-ssanames.c (init_ssanames): Add arguments FN and SIZE.
+       Use FN instead of cfun.
        (make_ssa_name_fn): Rename from make_ssa_name.
-       (pass_release_ssa_names): Add TODO_dump_func to finish
-       flags.
+       (pass_release_ssa_names): Add TODO_dump_func to finish flags.
        * tree-flow-inline.h (make_ssa_name): Move from
-       tree-ssanames.c.  Convert to static inline.  Call
-       make_ssa_name_fn.
+       tree-ssanames.c.  Convert to static inline.  Call make_ssa_name_fn.
        * omp-low.c (expand_omp_parallel):
        * tree-flow-inline.h (redirect_edge_var_map_result):
-       * tree-ssa.c (init_tree_ssa): Add argument FN.  Use it
-       instead of cfun.
+       * tree-ssa.c (init_tree_ssa): Add argument FN.  Use it instead of cfun.
        Update all users.
 
 2008-05-13  Tom Tromey  <tromey@redhat.com>

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 6d551e0f5ad52a89b4628c196e851a1c7acb53a3..945cd1b844537cf528ac3b2a64afb4ea13dbf039 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -23887,14 +23887,14 @@ ix86_expand_vector_init_general (bool mmx_ok, enum machine_mode mode,
        /* For V4SF and V4SI, we implement a concat of two V2 vectors.
           Recurse to load the two halves.  */
 
-       op0 = gen_reg_rtx (half_mode);
-       v = gen_rtvec (2, XVECEXP (vals, 0, 0), XVECEXP (vals, 0, 1));
-       ix86_expand_vector_init (false, op0, gen_rtx_PARALLEL (half_mode, v));
-
        op1 = gen_reg_rtx (half_mode);
        v = gen_rtvec (2, XVECEXP (vals, 0, 2), XVECEXP (vals, 0, 3));
        ix86_expand_vector_init (false, op1, gen_rtx_PARALLEL (half_mode, v));
 
+       op0 = gen_reg_rtx (half_mode);
+       v = gen_rtvec (2, XVECEXP (vals, 0, 0), XVECEXP (vals, 0, 1));
+       ix86_expand_vector_init (false, op0, gen_rtx_PARALLEL (half_mode, v));
+
        use_vec_concat = true;
       }
       break;
@@ -23911,10 +23911,10 @@ ix86_expand_vector_init_general (bool mmx_ok, enum machine_mode mode,
 
   if (use_vec_concat)
     {
-      if (!register_operand (op0, half_mode))
-       op0 = force_reg (half_mode, op0);
       if (!register_operand (op1, half_mode))
        op1 = force_reg (half_mode, op1);
+      if (!register_operand (op0, half_mode))
+       op0 = force_reg (half_mode, op0);
 
       emit_insn (gen_rtx_SET (VOIDmode, target,
                              gen_rtx_VEC_CONCAT (mode, op0, op1)));

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index d26c9098173b18d13430bba2538c29c837d9411c..699c4169f38c9e570a9a4c1ad95bc3aaf29ba888 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2008-05-13  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/36222
+       * gcc.target/i386/pr36222-1.c: New test.
+
 2008-05-13  H.J. Lu  <hongjiu.lu@intel.com>
 
        * gcc.target/i386/sse-init-v4hi-1.c: New.

diff --git a/gcc/testsuite/gcc.target/i386/pr36222-1.c b/gcc/testsuite/gcc.target/i386/pr36222-1.c
new file mode 100644 (file)
index 0000000..2d4c5b9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr36222-1.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse2" } */
+
+typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__));
+typedef int __v4si __attribute__ ((__vector_size__ (16)));
+
+__m128i _mm_set_epi32 (int __q3, int __q2, int __q1, int __q0)
+{
+  return (__m128i)(__v4si){ __q0, __q1, __q2, __q3 };
+}
+
+/* { dg-final { scan-assembler-not "movdqa" } } */