+1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
+
+ * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
+start-sanitize-sky
+ * interp.c (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook.
+ Call sim_engine_halt on BreakPoint.
+end-sanitize-sky
+
Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
* configure.in, configure (mips64vr5*-*-*): Added missing ;; in
/* Ensure that any active atomic read/modify/write operation will fail: */
LLBIT = 0;
+ /* Save registers before interrupt dispatching */
+#ifdef SIM_CPU_EXCEPTION_TRIGGER
+ SIM_CPU_EXCEPTION_TRIGGER(sd, cpu, cia);
+#endif
+
/* First, handle any simulator specific magic exceptions. These are not "real" exceptions, but
are exceptions which the simulator uses to implement different features. */
sim_stopped, SIM_SIGFPE);
break;
+ case BreakPoint:
+ sim_engine_halt (SD, CPU, NULL, PC, sim_stopped, SIM_SIGTRAP);
+ break;
+
case TLBModification:
case TLBLoad:
case TLBStore:
- case BreakPoint:
case SystemCall:
case Trap:
sim_engine_restart (SD, CPU, NULL, PC);