anv,radv,turnip: Lower TG4 offsets with nir_lower_tex

v2: turn on for turnip as well (Karol Herbst)

Reviewed-by: Karol Herbst <kherbst@redhat.com>

diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index bd045a0b92fb3382d2e343f339565ec92820535c..a1612c829b89d0542361b7caad357ec62e4134d8 100644 (file)
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -313,6 +313,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
 
        static const nir_lower_tex_options tex_options = {
          .lower_txp = ~0,
+         .lower_tg4_offsets = true,
        };
 
        nir_lower_tex(nir, &tex_options);

diff --git a/src/freedreno/ir3/ir3_nir.c b/src/freedreno/ir3/ir3_nir.c
index 138f8f1af66edf6e4afc836a539b0799569fd99a..606e044d347d9b3ad82cae33ccb34afaf9141da5 100644 (file)
--- a/src/freedreno/ir3/ir3_nir.c
+++ b/src/freedreno/ir3/ir3_nir.c
@@ -152,6 +152,7 @@ ir3_optimize_nir(struct ir3_shader *shader, nir_shader *s,
 {
        struct nir_lower_tex_options tex_options = {
                        .lower_rect = 0,
+                       .lower_tg4_offsets = true,
        };
 
        if (key) {

diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 7719ad40251862f207d1a6048ad3b85cff299080..370b66dc57d7d266c3f4a87a2422193e4de9f1d8 100644 (file)
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -683,6 +683,7 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir,
       .lower_txb_shadow_clamp = true,
       .lower_txd_shadow_clamp = true,
       .lower_txd_offset_clamp = true,
+      .lower_tg4_offsets = true,
    };
 
    OPT(nir_lower_tex, &tex_options);