re PR rtl-optimization/89862 (LTO bootstrap fails for ARM)

2019-03-29  Kugan Vivekanandarajah  <kuganv@linaro.org>
	    Eric Botcazou  <ebotcazou@adacore.com>

	PR rtl-optimization/89862
	* rtl.h (word_register_operation_p): Exclude CONST_INT from operations
	that operates on the full registers for WORD_REGISTER_OPERATIONS
	architectures.

Co-Authored-By: Eric Botcazou <ebotcazou@adacore.com>
From-SVN: r270030

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a9b1ee79632b8506e04620ac5d503b90ea114413..136785149168c938688567b639ddd7b397777ad1 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2019-03-29  Kugan Vivekanandarajah  <kuganv@linaro.org>
+           Eric Botcazou  <ebotcazou@adacore.com>
+
+       PR rtl-optimization/89862
+       * rtl.h (word_register_operation_p): Exclude CONST_INT from operations
+       that operates on the full registers for WORD_REGISTER_OPERATIONS
+       architectures.
+
 2019-03-29  Jim Wilson  <jimw@sifive.com>
 
        * common/config/riscv/riscv-common.c (riscv_parse_arch_string):

diff --git a/gcc/rtl.h b/gcc/rtl.h
index 1a021fbec5f3879047f56cc568ed29f6a8abe8f6..b4a906f918180bd3ed991e084f5ac6210c0def64 100644 (file)
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -4400,6 +4400,7 @@ word_register_operation_p (const_rtx x)
 {
   switch (GET_CODE (x))
     {
+    case CONST_INT:
     case ROTATE:
     case ROTATERT:
     case SIGN_EXTRACT: