re PR tree-optimization/64910 (tree reassociation results in poor code)

	PR tree-optimization/64910
	* config/i386/i386.md (testqi_ext_3): Allow HImode.

	PR tree-optimization/64910
	* gcc.target/i386/bittest.c: New test.

From-SVN: r231871

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f77d39188288e256ffa3679b5365dbb8526f1c62..733c2898d25ce539067f82130ef23d5446b3a9d2 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2015-12-20  Jeff Law  <law@redhat.com>
+
+       PR tree-optimization/64910
+       * config/i386/i386.md (testqi_ext_3): Allow HImode.
+
 2015-12-20  Andrew Pinsi  <apinski@cavium.com>
 
        * config/aarch64/atomics.md

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 49b221665fde0d649ec2d9f7b079328fab5f9ab6..e8178f3f9b6808f314620895118492e350852d4b 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -7868,7 +7868,7 @@
 ;; Combine likes to form bit extractions for some tests.  Humor it.
 (define_insn "*testqi_ext_3"
   [(set (reg FLAGS_REG)
-       (compare (zero_extract:SWI48
+       (compare (zero_extract:SWI248
                   (match_operand 0 "nonimmediate_operand" "rm")
                   (match_operand 1 "const_int_operand" "n")
                   (match_operand 2 "const_int_operand" "n"))

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 6a3e04488335a6879f938775e023f6759c1632e7..725ddef79aecc2efacf70d499732effeb5c1ab8e 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2015-12-20  Jeff Law  <law@redhat.com>
+
+       PR tree-optimization/64910
+       * gcc.target/i386/bittest.c: New test.
+
 2015-12-20  Eric Botcazou  <ebotcazou@adacore.com>
 
        * gnat.dg/complex1.adb: New test.

diff --git a/gcc/testsuite/gcc.target/i386/bittest.c b/gcc/testsuite/gcc.target/i386/bittest.c
new file mode 100644 (file)
index 0000000..7b7ce9e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/bittest.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+extern int dbg_cnt (void);
+
+struct function
+{
+  unsigned int calls_setjmp:1;
+};
+extern struct function *cfun;
+unsigned char
+gate_rtl_cprop (void)
+{
+  return !(cfun + 0)->calls_setjmp && dbg_cnt ();
+}
+
+/* This should be implementable without performing a bitmask as we can
+   just use a test imm,mem.  So instructions which load the object from
+   memory and mask off bits are unnecessary.  In theory we can just count
+   the move-with-extension, and and testb instructions.  There should be
+   only one.  */
+/* { dg-final { scan-assembler-times "movzbl|and|testb" 1 { target { i?86-*-* x86_64-*-*} } } } */