gas/testsuite/

2007-07-28  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4835
	* gas/i386/simd-intel.d: Updated.
	* gas/i386/simd.d: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

	* gas/i386/simd.s: Add new tests.
	* gas/i386/x86-64-simd.s: Likewise.

opcodes/

2007-07-28  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4835
	* i386-dis.c (Eq): New.
	(EMC): Renamed to ...
	(EMCq): This.  Use q_mode instead of v_mode.
	(prefix_user_table): Updated to use EXd, EXq, EMCq, Ed and Eq
	when appropriated.

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index a938d3caf15af6643801f48b5ee7bff0cb12148c..572d0cd47813edcd8ad5edf06fd718e5ba76f02a 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,14 @@
+2007-07-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR binutils/4835
+       * gas/i386/simd-intel.d: Updated.
+       * gas/i386/simd.d: Likewise.
+       * gas/i386/x86-64-simd-intel.d: Likewise.
+       * gas/i386/x86-64-simd.d: Likewise.
+
+       * gas/i386/simd.s: Add new tests.
+       * gas/i386/x86-64-simd.s: Likewise.
+
 2007-07-28  H.J. Lu  <hongjiu.lu@intel.com>
 
        * gas/i386/x86-64-opcode.d: Updated.

diff --git a/gas/testsuite/gas/i386/simd-intel.d b/gas/testsuite/gas/i386/simd-intel.d
index a63b8c57f4b0ccadac96853cfaddb5dc8b7c6f6a..a1e5d3d29e05674682c20dc10beb32a1a4584993 100644 (file)
--- a/gas/testsuite/gas/i386/simd-intel.d
+++ b/gas/testsuite/gas/i386/simd-intel.d
@@ -39,3 +39,35 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    66 0f 6c 0d 78 56 34 12         punpcklqdq xmm1,XMMWORD PTR ds:0x12345678
 [      ]*[a-f0-9]+:    66 0f 2e 0d 78 56 34 12         ucomisd xmm1,QWORD PTR ds:0x12345678
 [      ]*[a-f0-9]+:    0f 2e 0d 78 56 34 12    ucomiss xmm1,DWORD PTR ds:0x12345678
+[      ]*[a-f0-9]+:    f2 0f c2 00 00          cmpeqsd xmm0,QWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f3 0f c2 00 00          cmpeqss xmm0,DWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    66 0f 2a 00             cvtpi2pd xmm0,QWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    0f 2a 00                cvtpi2ps xmm0,QWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    0f 2d 00                cvtps2pi mm0,QWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f2 0f 2d 00             cvtsd2si eax,QWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f2 0f 5a 00             cvtsd2ss xmm0,QWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f3 0f 5a 00             cvtss2sd xmm0,DWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f3 0f 2d 00             cvtss2si eax,DWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f2 0f 5e 00             divsd  xmm0,QWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f3 0f 5e 00             divss  xmm0,DWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f2 0f 5f 00             maxsd  xmm0,QWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f3 0f 5f 00             maxss  xmm0,DWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f3 0f 5d 00             minss  xmm0,DWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f3 0f 5d 00             minss  xmm0,DWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f2 0f 2b 00             movntsd QWORD PTR \[eax\],xmm0
+[      ]*[a-f0-9]+:    f3 0f 2b 00             movntss DWORD PTR \[eax\],xmm0
+[      ]*[a-f0-9]+:    f2 0f 10 00             movsd  xmm0,QWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f2 0f 11 00             movsd  QWORD PTR \[eax\],xmm0
+[      ]*[a-f0-9]+:    f3 0f 10 00             movss  xmm0,DWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f3 0f 11 00             movss  DWORD PTR \[eax\],xmm0
+[      ]*[a-f0-9]+:    f2 0f 59 00             mulsd  xmm0,QWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f3 0f 59 00             mulss  xmm0,DWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f3 0f 53 00             rcpss  xmm0,DWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    66 0f 3a 0b 00 00       roundsd xmm0,QWORD PTR \[eax\],0x0
+[      ]*[a-f0-9]+:    66 0f 3a 0a 00 00       roundss xmm0,DWORD PTR \[eax\],0x0
+[      ]*[a-f0-9]+:    f3 0f 52 00             rsqrtss xmm0,DWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f2 0f 51 00             sqrtsd xmm0,QWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f3 0f 51 00             sqrtss xmm0,DWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f2 0f 5c 00             subsd  xmm0,QWORD PTR \[eax\]
+[      ]*[a-f0-9]+:    f3 0f 5c 00             subss  xmm0,DWORD PTR \[eax\]
+#pass

diff --git a/gas/testsuite/gas/i386/simd.d b/gas/testsuite/gas/i386/simd.d
index b04c27b03166725d420db6c4d4282f2f53165a48..777607161fce8939610aa7789460cfc4e0f96c44 100644 (file)
--- a/gas/testsuite/gas/i386/simd.d
+++ b/gas/testsuite/gas/i386/simd.d
@@ -38,3 +38,35 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    66 0f 6c 0d 78 56 34 12         punpcklqdq 0x12345678,%xmm1
 [      ]*[a-f0-9]+:    66 0f 2e 0d 78 56 34 12         ucomisd 0x12345678,%xmm1
 [      ]*[a-f0-9]+:    0f 2e 0d 78 56 34 12    ucomiss 0x12345678,%xmm1
+[      ]*[a-f0-9]+:    f2 0f c2 00 00          cmpeqsd \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f c2 00 00          cmpeqss \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    66 0f 2a 00             cvtpi2pd \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    0f 2a 00                cvtpi2ps \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    0f 2d 00                cvtps2pi \(%eax\),%mm0
+[      ]*[a-f0-9]+:    f2 0f 2d 00             cvtsd2si \(%eax\),%eax
+[      ]*[a-f0-9]+:    f2 0f 5a 00             cvtsd2ss \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 5a 00             cvtss2sd \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 2d 00             cvtss2si \(%eax\),%eax
+[      ]*[a-f0-9]+:    f2 0f 5e 00             divsd  \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 5e 00             divss  \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    f2 0f 5f 00             maxsd  \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 5f 00             maxss  \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 5d 00             minss  \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 5d 00             minss  \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    f2 0f 2b 00             movntsd %xmm0,\(%eax\)
+[      ]*[a-f0-9]+:    f3 0f 2b 00             movntss %xmm0,\(%eax\)
+[      ]*[a-f0-9]+:    f2 0f 10 00             movsd  \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    f2 0f 11 00             movsd  %xmm0,\(%eax\)
+[      ]*[a-f0-9]+:    f3 0f 10 00             movss  \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 11 00             movss  %xmm0,\(%eax\)
+[      ]*[a-f0-9]+:    f2 0f 59 00             mulsd  \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 59 00             mulss  \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 53 00             rcpss  \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    66 0f 3a 0b 00 00       roundsd \$0x0,\(%eax\),%xmm0
+[      ]*[a-f0-9]+:    66 0f 3a 0a 00 00       roundss \$0x0,\(%eax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 52 00             rsqrtss \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    f2 0f 51 00             sqrtsd \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 51 00             sqrtss \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    f2 0f 5c 00             subsd  \(%eax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 5c 00             subss  \(%eax\),%xmm0
+#pass

diff --git a/gas/testsuite/gas/i386/simd.s b/gas/testsuite/gas/i386/simd.s
index 592cd5e9f901e9060df547de936fd0517ea162f2..d0861517b7352a4e2e9839c25cfa4b0809ab37c7 100644 (file)
--- a/gas/testsuite/gas/i386/simd.s
+++ b/gas/testsuite/gas/i386/simd.s
@@ -31,3 +31,35 @@ _start:
        punpcklqdq 0x12345678,%xmm1
        ucomisd 0x12345678,%xmm1
        ucomiss 0x12345678,%xmm1
+
+       cmpeqsd (%eax),%xmm0
+       cmpeqss (%eax),%xmm0
+       cvtpi2pd (%eax),%xmm0
+       cvtpi2ps (%eax),%xmm0
+       cvtps2pi (%eax),%mm0
+       cvtsd2si (%eax),%eax
+       cvtsd2ss (%eax),%xmm0
+       cvtss2sd (%eax),%xmm0
+       cvtss2si (%eax),%eax
+       divsd (%eax),%xmm0
+       divss (%eax),%xmm0
+       maxsd (%eax),%xmm0
+       maxss (%eax),%xmm0
+       minss (%eax),%xmm0
+       minss (%eax),%xmm0
+       movntsd %xmm0,(%eax)
+       movntss %xmm0,(%eax)
+       movsd (%eax),%xmm0
+       movsd %xmm0,(%eax)
+       movss (%eax),%xmm0
+       movss %xmm0,(%eax)
+       mulsd (%eax),%xmm0
+       mulss (%eax),%xmm0
+       rcpss (%eax),%xmm0
+       roundsd $0,(%eax),%xmm0
+       roundss $0,(%eax),%xmm0
+       rsqrtss (%eax),%xmm0
+       sqrtsd (%eax),%xmm0
+       sqrtss (%eax),%xmm0
+       subsd (%eax),%xmm0
+       subss (%eax),%xmm0

diff --git a/gas/testsuite/gas/i386/x86-64-simd-intel.d b/gas/testsuite/gas/i386/x86-64-simd-intel.d
index b7ac86aff063fa4364e4c72254a2f117897a7814..240a88d4e74c11a0da49a377b098bb3f3ea1ffda 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-simd-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-simd-intel.d
@@ -41,3 +41,37 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    66 0f 6c 0d 78 56 34 12         punpcklqdq xmm1,XMMWORD PTR \[rip\+0x12345678\][        ]*(#.*)?
 [      ]*[a-f0-9]+:    66 0f 2e 0d 78 56 34 12         ucomisd xmm1,QWORD PTR \[rip\+0x12345678\][     ]*(#.*)?
 [      ]*[a-f0-9]+:    0f 2e 0d 78 56 34 12    ucomiss xmm1,DWORD PTR \[rip\+0x12345678\][     ]*(#.*)?
+[      ]*[a-f0-9]+:    f2 0f c2 00 00          cmpeqsd xmm0,QWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f3 0f c2 00 00          cmpeqss xmm0,DWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    66 0f 2a 00             cvtpi2pd xmm0,QWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    0f 2a 00                cvtpi2ps xmm0,QWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    0f 2d 00                cvtps2pi mm0,QWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f2 0f 2d 00             cvtsd2si eax,QWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f2 48 0f 2d 00          cvtsd2si rax,QWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f2 0f 5a 00             cvtsd2ss xmm0,QWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f3 0f 5a 00             cvtss2sd xmm0,DWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f3 48 0f 2d 00          cvtss2si rax,DWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f3 0f 2d 00             cvtss2si eax,DWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f2 0f 5e 00             divsd  xmm0,QWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f3 0f 5e 00             divss  xmm0,DWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f2 0f 5f 00             maxsd  xmm0,QWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f3 0f 5f 00             maxss  xmm0,DWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f3 0f 5d 00             minss  xmm0,DWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f3 0f 5d 00             minss  xmm0,DWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f2 0f 2b 00             movntsd QWORD PTR \[rax\],xmm0
+[      ]*[a-f0-9]+:    f3 0f 2b 00             movntss DWORD PTR \[rax\],xmm0
+[      ]*[a-f0-9]+:    f2 0f 10 00             movsd  xmm0,QWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f2 0f 11 00             movsd  QWORD PTR \[rax\],xmm0
+[      ]*[a-f0-9]+:    f3 0f 10 00             movss  xmm0,DWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f3 0f 11 00             movss  DWORD PTR \[rax\],xmm0
+[      ]*[a-f0-9]+:    f2 0f 59 00             mulsd  xmm0,QWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f3 0f 59 00             mulss  xmm0,DWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f3 0f 53 00             rcpss  xmm0,DWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    66 0f 3a 0b 00 00       roundsd xmm0,QWORD PTR \[rax\],0x0
+[      ]*[a-f0-9]+:    66 0f 3a 0a 00 00       roundss xmm0,DWORD PTR \[rax\],0x0
+[      ]*[a-f0-9]+:    f3 0f 52 00             rsqrtss xmm0,DWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f2 0f 51 00             sqrtsd xmm0,QWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f3 0f 51 00             sqrtss xmm0,DWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f2 0f 5c 00             subsd  xmm0,QWORD PTR \[rax\]
+[      ]*[a-f0-9]+:    f3 0f 5c 00             subss  xmm0,DWORD PTR \[rax\]
+#pass

diff --git a/gas/testsuite/gas/i386/x86-64-simd.d b/gas/testsuite/gas/i386/x86-64-simd.d
index 12f7831a86d0739cfa974c32692e6f5dabc3b6bc..278ba2ef6885209b075ca42ef9fbb84facedd0f4 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-simd.d
+++ b/gas/testsuite/gas/i386/x86-64-simd.d
@@ -40,3 +40,37 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    66 0f 6c 0d 78 56 34 12         punpcklqdq 0x12345678\(%rip\),%xmm1[    ]*(#.*)?
 [      ]*[a-f0-9]+:    66 0f 2e 0d 78 56 34 12         ucomisd 0x12345678\(%rip\),%xmm1[       ]*(#.*)?
 [      ]*[a-f0-9]+:    0f 2e 0d 78 56 34 12    ucomiss 0x12345678\(%rip\),%xmm1[       ]*(#.*)?
+[      ]*[a-f0-9]+:    f2 0f c2 00 00          cmpeqsd \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f c2 00 00          cmpeqss \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    66 0f 2a 00             cvtpi2pd \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    0f 2a 00                cvtpi2ps \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    0f 2d 00                cvtps2pi \(%rax\),%mm0
+[      ]*[a-f0-9]+:    f2 0f 2d 00             cvtsd2si \(%rax\),%eax
+[      ]*[a-f0-9]+:    f2 48 0f 2d 00          cvtsd2siq \(%rax\),%rax
+[      ]*[a-f0-9]+:    f2 0f 5a 00             cvtsd2ss \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 5a 00             cvtss2sd \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    f3 48 0f 2d 00          cvtss2siq \(%rax\),%rax
+[      ]*[a-f0-9]+:    f3 0f 2d 00             cvtss2si \(%rax\),%eax
+[      ]*[a-f0-9]+:    f2 0f 5e 00             divsd  \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 5e 00             divss  \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    f2 0f 5f 00             maxsd  \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 5f 00             maxss  \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 5d 00             minss  \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 5d 00             minss  \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    f2 0f 2b 00             movntsd %xmm0,\(%rax\)
+[      ]*[a-f0-9]+:    f3 0f 2b 00             movntss %xmm0,\(%rax\)
+[      ]*[a-f0-9]+:    f2 0f 10 00             movsd  \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    f2 0f 11 00             movsd  %xmm0,\(%rax\)
+[      ]*[a-f0-9]+:    f3 0f 10 00             movss  \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 11 00             movss  %xmm0,\(%rax\)
+[      ]*[a-f0-9]+:    f2 0f 59 00             mulsd  \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 59 00             mulss  \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 53 00             rcpss  \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    66 0f 3a 0b 00 00       roundsd \$0x0,\(%rax\),%xmm0
+[      ]*[a-f0-9]+:    66 0f 3a 0a 00 00       roundss \$0x0,\(%rax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 52 00             rsqrtss \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    f2 0f 51 00             sqrtsd \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 51 00             sqrtss \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    f2 0f 5c 00             subsd  \(%rax\),%xmm0
+[      ]*[a-f0-9]+:    f3 0f 5c 00             subss  \(%rax\),%xmm0
+#pass

diff --git a/gas/testsuite/gas/i386/x86-64-simd.s b/gas/testsuite/gas/i386/x86-64-simd.s
index 9422ac2827aad7d045a34191c19515032a1a8c2f..0fd40ce58a649d2d60e30690e22e99cf3523b45e 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-simd.s
+++ b/gas/testsuite/gas/i386/x86-64-simd.s
@@ -33,3 +33,37 @@ _start:
        punpcklqdq 0x12345678(%rip),%xmm1
        ucomisd 0x12345678(%rip),%xmm1
        ucomiss 0x12345678(%rip),%xmm1
+
+       cmpeqsd (%rax),%xmm0
+       cmpeqss (%rax),%xmm0
+       cvtpi2pd (%rax),%xmm0
+       cvtpi2ps (%rax),%xmm0
+       cvtps2pi (%rax),%mm0
+       cvtsd2si (%rax),%eax
+       cvtsd2siq (%rax),%rax
+       cvtsd2ss (%rax),%xmm0
+       cvtss2sd (%rax),%xmm0
+       cvtss2siq (%rax),%rax
+       cvtss2si (%rax),%eax
+       divsd (%rax),%xmm0
+       divss (%rax),%xmm0
+       maxsd (%rax),%xmm0
+       maxss (%rax),%xmm0
+       minss (%rax),%xmm0
+       minss (%rax),%xmm0
+       movntsd %xmm0,(%rax)
+       movntss %xmm0,(%rax)
+       movsd (%rax),%xmm0
+       movsd %xmm0,(%rax)
+       movss (%rax),%xmm0
+       movss %xmm0,(%rax)
+       mulsd (%rax),%xmm0
+       mulss (%rax),%xmm0
+       rcpss (%rax),%xmm0
+       roundsd $0,(%rax),%xmm0
+       roundss $0,(%rax),%xmm0
+       rsqrtss (%rax),%xmm0
+       sqrtsd (%rax),%xmm0
+       sqrtss (%rax),%xmm0
+       subsd (%rax),%xmm0
+       subss (%rax),%xmm0

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 0f9cebfe7fb6ce3d8e9a82cb057482e90d66dab2..e8e9c6944709ee17eba18528190a31a5bf338fd7 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,12 @@
+2007-07-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR binutils/4835
+       * i386-dis.c (Eq): New.
+       (EMC): Renamed to ...
+       (EMCq): This.  Use q_mode instead of v_mode.
+       (prefix_user_table): Updated to use EXd, EXq, EMCq, Ed and Eq
+       when appropriated.
+
 2007-07-28  H.J. Lu  <hongjiu.lu@intel.com>
 
        * i386-dis.c (dis386_twobyte): Change "movd" to "movK".

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 291c0794ae8b7ff3546216b1f8998210cbc8a7e2..48b701f86d1af70b508194ad7ca8801e45cb0833 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -207,6 +207,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
 #define Edqw { OP_E, dqw_mode }
 #define Edqb { OP_E, dqb_mode }
 #define Edqd { OP_E, dqd_mode }
+#define Eq { OP_E, q_mode }
 #define indirEv { OP_indirE, stack_v_mode }
 #define indirEp { OP_indirE, f_mode }
 #define stackEv { OP_E, stack_v_mode }
@@ -315,7 +316,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
 #define EXx { OP_EX, x_mode }
 #define MS { OP_MS, v_mode }
 #define XS { OP_XS, v_mode }
-#define EMC { OP_EMC, v_mode }
+#define EMCq { OP_EMC, q_mode }
 #define MXC { OP_MXC, 0 }
 #define VM { OP_VMX, q_mode }
 #define OPSUF { OP_3DNowSuffix, 0 }
@@ -1847,100 +1848,100 @@ static const struct dis386 prefix_user_table[][4] = {
   /* PREGRP1 */
   {
     { "", { XM, EXx, OPSIMD } },       /* See OP_SIMD_SUFFIX.  */
+    { "", { XM, EXd, OPSIMD } },
     { "", { XM, EXx, OPSIMD } },
-    { "", { XM, EXx, OPSIMD } },
-    { "", { XM, EXx, OPSIMD } },
+    { "", { XM, EXq, OPSIMD } },
   },
   /* PREGRP2 */
   {
-    { "cvtpi2ps", { XM, EMC } },
+    { "cvtpi2ps", { XM, EMCq } },
     { "cvtsi2ssY", { XM, Ev } },
-    { "cvtpi2pd", { XM, EMC } },
+    { "cvtpi2pd", { XM, EMCq } },
     { "cvtsi2sdY", { XM, Ev } },
   },
   /* PREGRP3 */
   {
-    { "cvtps2pi", { MXC, EXx } },
-    { "cvtss2siY", { Gv, EXx } },
+    { "cvtps2pi", { MXC, EXq } },
+    { "cvtss2siY", { Gv, EXd } },
     { "cvtpd2pi", { MXC, EXx } },
-    { "cvtsd2siY", { Gv, EXx } },
+    { "cvtsd2siY", { Gv, EXq } },
   },
   /* PREGRP4 */
   {
-    { "cvttps2pi", { MXC, EXx } },
-    { "cvttss2siY", { Gv, EXx } },
+    { "cvttps2pi", { MXC, EXq } },
+    { "cvttss2siY", { Gv, EXd } },
     { "cvttpd2pi", { MXC, EXx } },
-    { "cvttsd2siY", { Gv, EXx } },
+    { "cvttsd2siY", { Gv, EXq } },
   },
   /* PREGRP5 */
   {
     { "divps", { XM, EXx } },
-    { "divss", { XM, EXx } },
+    { "divss", { XM, EXd } },
     { "divpd", { XM, EXx } },
-    { "divsd", { XM, EXx } },
+    { "divsd", { XM, EXq } },
   },
   /* PREGRP6 */
   {
     { "maxps", { XM, EXx } },
-    { "maxss", { XM, EXx } },
+    { "maxss", { XM, EXd } },
     { "maxpd", { XM, EXx } },
-    { "maxsd", { XM, EXx } },
+    { "maxsd", { XM, EXq } },
   },
   /* PREGRP7 */
   {
     { "minps", { XM, EXx } },
-    { "minss", { XM, EXx } },
+    { "minss", { XM, EXd } },
     { "minpd", { XM, EXx } },
-    { "minsd", { XM, EXx } },
+    { "minsd", { XM, EXq } },
   },
   /* PREGRP8 */
   {
     { "movups",        { XM, EXx } },
-    { "movss", { XM, EXx } },
+    { "movss", { XM, EXd } },
     { "movupd",        { XM, EXx } },
-    { "movsd", { XM, EXx } },
+    { "movsd", { XM, EXq } },
   },
   /* PREGRP9 */
   {
     { "movups",        { EXx,  XM } },
-    { "movss", { EXx,  XM } },
+    { "movss", { EXd,  XM } },
     { "movupd",        { EXx,  XM } },
-    { "movsd", { EXx,  XM } },
+    { "movsd", { EXq,  XM } },
   },
   /* PREGRP10 */
   {
     { "mulps", { XM, EXx } },
-    { "mulss", { XM, EXx } },
+    { "mulss", { XM, EXd } },
     { "mulpd", { XM, EXx } },
-    { "mulsd", { XM, EXx } },
+    { "mulsd", { XM, EXq } },
   },
   /* PREGRP11 */
   {
     { "rcpps", { XM, EXx } },
-    { "rcpss", { XM, EXx } },
+    { "rcpss", { XM, EXd } },
     { "(bad)", { XM, EXx } },
     { "(bad)", { XM, EXx } },
   },
   /* PREGRP12 */
   {
     { "rsqrtps",{ XM, EXx } },
-    { "rsqrtss",{ XM, EXx } },
+    { "rsqrtss",{ XM, EXd } },
     { "(bad)", { XM, EXx } },
     { "(bad)", { XM, EXx } },
   },
   /* PREGRP13 */
   {
     { "sqrtps", { XM, EXx } },
-    { "sqrtss", { XM, EXx } },
+    { "sqrtss", { XM, EXd } },
     { "sqrtpd", { XM, EXx } },
-    { "sqrtsd",        { XM, EXx } },
+    { "sqrtsd",        { XM, EXq } },
   },
   /* PREGRP14 */
   {
     { "subps", { XM, EXx } },
-    { "subss", { XM, EXx } },
+    { "subss", { XM, EXd } },
     { "subpd", { XM, EXx } },
-    { "subsd", { XM, EXx } },
+    { "subsd", { XM, EXq } },
   },
   /* PREGRP15 */
   {
@@ -1959,9 +1960,9 @@ static const struct dis386 prefix_user_table[][4] = {
   /* PREGRP17 */
   {
     { "cvtps2pd", { XM, EXq } },
-    { "cvtss2sd", { XM, EXx } },
+    { "cvtss2sd", { XM, EXd } },
     { "cvtpd2ps", { XM, EXx } },
-    { "cvtsd2ss", { XM, EXx } },
+    { "cvtsd2ss", { XM, EXq } },
   },
   /* PREGRP18 */
   {
@@ -2071,9 +2072,9 @@ static const struct dis386 prefix_user_table[][4] = {
   /* PREGRP33 */
   {
     {"movntps", { Ev, XM } },
-    {"movntss", { Ev, XM } },
+    {"movntss", { Ed, XM } },
     {"movntpd", { Ev, XM } },
-    {"movntsd", { Ev, XM } },
+    {"movntsd", { Eq, XM } },
   },
 
   /* PREGRP34 */
@@ -2376,7 +2377,7 @@ static const struct dis386 prefix_user_table[][4] = {
   {
     { "(bad)", { XX } },
     { "(bad)", { XX } },
-    { "roundss", { XM, EXx, Ib } },
+    { "roundss", { XM, EXd, Ib } },
     { "(bad)", { XX } },
   },
 
@@ -2384,7 +2385,7 @@ static const struct dis386 prefix_user_table[][4] = {
   {
     { "(bad)", { XX } },
     { "(bad)", { XX } },
-    { "roundsd", { XM, EXx, Ib } },
+    { "roundsd", { XM, EXq, Ib } },
     { "(bad)", { XX } },
   },