i965: Don't implicitly set predicate default state in brw_CMP.

Previously, brw_CMP with a null destination implicitly set the default
state to make future instructions predicated.  This is messy and
confusing - emitting a CMP that populates the flag register and later
using it to predicate instructions are logically separate.  With the
main compiler, we may even schedule instructions between the CMP and the
user of the flag value.

This patch simplifies brw_CMP to just emit a CMP instruction, and not
mess with predication.  It also updates all necessary callers.  These
mostly fell into two patterns:

1. brw_CMP followed by brw_IF.

   We don't need to do anything special here; brw_IF already sets up
   predication appropriately.

2. brw_CMP followed by a single predicated instruction.

   The old model was to call brw_CMP, emit the next (predicated)
   instruction, then disable predication for any instructions beyond
   that.  Instead, just explicitly set predicate_control on the single
   instruction we want to predicate.  It's no more code, and requires
   less cross-module knowledge.

This drops setting flag_value to 0xff as well, which is a field only
used by the SF compile.  There is only one brw_CMP call in the SF code,
which is in do_twoside_caller, and called at the start of
brw_emit_tri_setup, where flag_value is already 0xff.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

diff --git a/src/mesa/drivers/dri/i965/brw_clip_line.c b/src/mesa/drivers/dri/i965/brw_clip_line.c
index 17891c69e927889c431ab0b032f9d3f2d0dd3164..a8c2cac52381b80c2d184c5549bdb2eec4b54b9f 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_clip_line.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_line.c
@@ -130,6 +130,7 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
 {
    struct brw_compile *p = &c->func;
    struct brw_context *brw = p->brw;
+   struct brw_instruction *inst;
    struct brw_indirect vtx0     = brw_indirect(0, 0);
    struct brw_indirect vtx1      = brw_indirect(1, 0);
    struct brw_indirect newvtx0   = brw_indirect(2, 0);
@@ -228,8 +229,8 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
              brw_MUL(p, c->reg.t, c->reg.t, c->reg.dp1);
 
              brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t1 );
-             brw_MOV(p, c->reg.t1, c->reg.t);
-             brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+             inst = brw_MOV(p, c->reg.t1, c->reg.t);
+             inst->header.predicate_control = BRW_PREDICATE_NORMAL;
         }
         brw_ELSE(p);
         {
@@ -250,8 +251,8 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
                  brw_MUL(p, c->reg.t, c->reg.t, c->reg.dp0);
 
                  brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t0 );
-                 brw_MOV(p, c->reg.t0, c->reg.t);
-                 brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+                 inst = brw_MOV(p, c->reg.t0, c->reg.t);
+                 inst->header.predicate_control = BRW_PREDICATE_NORMAL;
              }
 
              if (brw->has_negative_rhw_bug) {

diff --git a/src/mesa/drivers/dri/i965/brw_clip_tri.c b/src/mesa/drivers/dri/i965/brw_clip_tri.c
index fdab2605213672bc377558040403d9d0bd094deb..5894b807d7572d0ea4ef5f1a4ed0543033b21cd7 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_clip_tri.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_tri.c
@@ -262,6 +262,7 @@ load_clip_distance(struct brw_clip_compile *c, struct brw_indirect vtx,
 void brw_clip_tri( struct brw_clip_compile *c )
 {
    struct brw_compile *p = &c->func;
+   struct brw_instruction *inst;
    struct brw_indirect vtx = brw_indirect(0, 0);
    struct brw_indirect vtxPrev = brw_indirect(1, 0);
    struct brw_indirect vtxOut = brw_indirect(2, 0);
@@ -337,8 +338,8 @@ void brw_clip_tri( struct brw_clip_compile *c )
                  /* If (vtxOut == 0) vtxOut = vtxPrev
                   */
                  brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_EQ, get_addr_reg(vtxOut), brw_imm_uw(0) );
-                 brw_MOV(p, get_addr_reg(vtxOut), get_addr_reg(vtxPrev) );
-                 brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+                  inst = brw_MOV(p, get_addr_reg(vtxOut), get_addr_reg(vtxPrev));
+                  inst->header.predicate_control = BRW_PREDICATE_NORMAL;
 
                  brw_clip_interp_vertex(c, vtxOut, vtxPrev, vtx, c->reg.t, false);
 
@@ -378,8 +379,8 @@ void brw_clip_tri( struct brw_clip_compile *c )
                  /* If (vtxOut == 0) vtxOut = vtx
                   */
                  brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_EQ, get_addr_reg(vtxOut), brw_imm_uw(0) );
-                 brw_MOV(p, get_addr_reg(vtxOut), get_addr_reg(vtx) );
-                 brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+                  inst = brw_MOV(p, get_addr_reg(vtxOut), get_addr_reg(vtx));
+                  inst->header.predicate_control = BRW_PREDICATE_NORMAL;
 
                  brw_clip_interp_vertex(c, vtxOut, vtx, vtxPrev, c->reg.t, true);
 
@@ -433,6 +434,7 @@ void brw_clip_tri( struct brw_clip_compile *c )
              BRW_CONDITIONAL_GE,
              c->reg.nr_verts,
              brw_imm_ud(3));
+      brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
 
       /* && (planemask>>=1) != 0
        */
@@ -515,6 +517,7 @@ static void maybe_do_clip_tri( struct brw_clip_compile *c )
 
 static void brw_clip_test( struct brw_clip_compile *c )
 {
+    struct brw_instruction *inst;
     struct brw_reg t = retype(get_tmp(c), BRW_REGISTER_TYPE_UD);
     struct brw_reg t1 = retype(get_tmp(c), BRW_REGISTER_TYPE_UD);
     struct brw_reg t2 = retype(get_tmp(c), BRW_REGISTER_TYPE_UD);
@@ -569,16 +572,16 @@ static void brw_clip_test( struct brw_clip_compile *c )
     brw_AND(p, t, t, brw_imm_ud(0x1));
     brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ,
             get_element(t, 0), brw_imm_ud(0));
-    brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<5)));
-    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+    inst = brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<5)));
+    inst->header.predicate_control = BRW_PREDICATE_NORMAL;
     brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ,
             get_element(t, 1), brw_imm_ud(0));
-    brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<3)));
-    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+    inst = brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<3)));
+    inst->header.predicate_control = BRW_PREDICATE_NORMAL;
     brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ,
             get_element(t, 2), brw_imm_ud(0));
-    brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<1)));
-    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+    inst = brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<1)));
+    inst->header.predicate_control = BRW_PREDICATE_NORMAL;
 
     /* test farz, xmax, ymax plane */
     /* clip.xyz > clip.w */
@@ -607,16 +610,16 @@ static void brw_clip_test( struct brw_clip_compile *c )
     brw_AND(p, t, t, brw_imm_ud(0x1));
     brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ,
             get_element(t, 0), brw_imm_ud(0));
-    brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<4)));
-    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+    inst = brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<4)));
+    inst->header.predicate_control = BRW_PREDICATE_NORMAL;
     brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ,
             get_element(t, 1), brw_imm_ud(0));
-    brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<2)));
-    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+    inst = brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<2)));
+    inst->header.predicate_control = BRW_PREDICATE_NORMAL;
     brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ,
             get_element(t, 2), brw_imm_ud(0));
-    brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<0)));
-    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+    inst = brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<0)));
+    inst->header.predicate_control = BRW_PREDICATE_NORMAL;
 
     release_tmps(c);
 }

diff --git a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
index 6dc52dbb04d045c7b9f5100e6b7582b73313aef5..d7022c279d89482ded62a265f9df220235f956ba 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c
@@ -195,6 +195,7 @@ static void compute_offset( struct brw_clip_compile *c )
    struct brw_compile *p = &c->func;
    struct brw_reg off = c->reg.offset;
    struct brw_reg dir = c->reg.dir;
+   struct brw_instruction *inst;
 
    brw_math_invert(p, get_element(off, 2), get_element(dir, 2));
    brw_MUL(p, vec2(off), dir, get_element(off, 2));
@@ -205,8 +206,9 @@ static void compute_offset( struct brw_clip_compile *c )
           brw_abs(get_element(off, 0)),
           brw_abs(get_element(off, 1)));
 
-   brw_SEL(p, vec1(off), brw_abs(get_element(off, 0)), brw_abs(get_element(off, 1)));
-   brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+   inst = brw_SEL(p, vec1(off),
+                  brw_abs(get_element(off, 0)), brw_abs(get_element(off, 1)));
+   inst->header.predicate_control = BRW_PREDICATE_NORMAL;
 
    brw_MUL(p, vec1(off), off, brw_imm_f(c->key.offset_factor));
    brw_ADD(p, vec1(off), off, brw_imm_f(c->key.offset_units));

diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 7448512a7b57eb41cc1f52293ff9e751e7d37f92..2fa65e98f9f153d7cffdc7db63756ea75838673d 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -1802,19 +1802,6 @@ void brw_CMP(struct brw_compile *p,
    brw_set_src0(p, insn, src0);
    brw_set_src1(p, insn, src1);
 
-/*    guess_execution_size(insn, src0); */
-
-
-   /* Make it so that future instructions will use the computed flag
-    * value until brw_set_predicate_control_flag_value() is called
-    * again.
-    */
-   if (dest.file == BRW_ARCHITECTURE_REGISTER_FILE &&
-       dest.nr == 0) {
-      p->current->header.predicate_control = BRW_PREDICATE_NORMAL;
-      p->flag_value = 0xff;
-   }
-
    /* Item WaCMPInstNullDstForcesThreadSwitch in the Haswell Bspec workarounds
     * page says:
     *    "Any CMP instruction with a null destination must use a {switch}."

diff --git a/src/mesa/drivers/dri/i965/brw_gs_emit.c b/src/mesa/drivers/dri/i965/brw_gs_emit.c
index 31b595620763126d8dc4707315278bc1445a08d9..f74ac6891e63b6e39cdda5df6b78903fded67abd 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_gs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_gs_emit.c
@@ -346,6 +346,7 @@ gen6_sol_program(struct brw_ff_gs_compile *c, struct brw_ff_gs_prog_key *key,
                 unsigned num_verts, bool check_edge_flags)
 {
    struct brw_compile *p = &c->func;
+   struct brw_instruction *inst;
    c->prog_data.svbi_postincrement_value = num_verts;
 
    brw_ff_gs_alloc_regs(c, num_verts, true);
@@ -407,10 +408,10 @@ gen6_sol_program(struct brw_ff_gs_compile *c, struct brw_ff_gs_prog_key *key,
          /* If so, then overwrite destination_indices_uw with the appropriate
           * reordering.
           */
-         brw_MOV(p, destination_indices_uw,
-                 brw_imm_v(key->pv_first ? 0x00010200    /* (0, 2, 1) */
-                                         : 0x00020001)); /* (1, 0, 2) */
-         brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+         inst = brw_MOV(p, destination_indices_uw,
+                        brw_imm_v(key->pv_first ? 0x00010200    /* (0, 2, 1) */
+                                                : 0x00020001)); /* (1, 0, 2) */
+         inst->header.predicate_control = BRW_PREDICATE_NORMAL;
       }
       brw_ADD(p, c->reg.destination_indices,
               c->reg.destination_indices, get_element_ud(c->reg.SVBI, 0));