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ignore protect endprotect
author
argama
<argama@gmail.com>
Tue, 16 Oct 2018 13:33:37 +0000
(21:33 +0800)
committer
argama
<argama@gmail.com>
Tue, 16 Oct 2018 13:33:37 +0000
(21:33 +0800)
frontends/verilog/verilog_lexer.l
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diff --git
a/frontends/verilog/verilog_lexer.l
b/frontends/verilog/verilog_lexer.l
index 83921bf0be893641d42afc3e3a2bc3fee5d4c1cd..2c4880b84ccd29872a4ab2a650f2a4f843c32b75 100644
(file)
--- a/
frontends/verilog/verilog_lexer.l
+++ b/
frontends/verilog/verilog_lexer.l
@@
-135,6
+135,9
@@
YOSYS_NAMESPACE_END
frontend_verilog_yyerror("Unsupported default nettype: %s", p);
}
+"`protect"[^\n]* /* ignore `protect*/
+"`endprotect"[^\n]* /* ignore `endprotect*/
+
"`"[a-zA-Z_$][a-zA-Z0-9_$]* {
frontend_verilog_yyerror("Unimplemented compiler directive or undefined macro %s.", yytext);
}